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Tue, 24 Sep 2024 22:59:57 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 48OMxu0h027320 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 24 Sep 2024 22:59:56 GMT Received: from jesszhan-linux.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 24 Sep 2024 15:59:56 -0700 From: Jessica Zhang Date: Tue, 24 Sep 2024 15:59:25 -0700 Subject: [PATCH v2 09/22] drm/msm/dpu: add devcoredumps for cwb registers MIME-Version: 1.0 Message-ID: <20240924-concurrent-wb-v2-9-7849f900e863@quicinc.com> References: <20240924-concurrent-wb-v2-0-7849f900e863@quicinc.com> In-Reply-To: <20240924-concurrent-wb-v2-0-7849f900e863@quicinc.com> To: Rob Clark , Dmitry Baryshkov , , Sean Paul , Marijn Suijten , "David Airlie" , Daniel Vetter , "Maarten Lankhorst" , Maxime Ripard , Thomas Zimmermann CC: , , , , , Rob Clark , =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= , "Jessica Zhang" X-Mailer: b4 0.15-dev-99b12 X-Developer-Signature: v=1; a=ed25519-sha256; t=1727218793; l=1094; i=quic_jesszhan@quicinc.com; s=20230329; h=from:subject:message-id; bh=2rsP3u3enycrNIgv6cRl4ii0K028j81PzAnFLtOhVtQ=; b=JtcYmrqlkKtPzw7ks0XPy4nHL9+927iYEAppNggNzoL3aOnP0r9qTMKzXjqpm39IIZxt5/iG+ uuS83uLQcUcAYqjUU1IzhyIdzqNtf+Xl3haC7k6cUNemg4lY3URbxoG X-Developer-Key: i=quic_jesszhan@quicinc.com; a=ed25519; pk=gAUCgHZ6wTJOzQa3U0GfeCDH7iZLlqIEPo4rrjfDpWE= X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: UoWIsTMpF6i37TOLAMfxgR41-2WUNNp_ X-Proofpoint-ORIG-GUID: UoWIsTMpF6i37TOLAMfxgR41-2WUNNp_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 adultscore=0 priorityscore=1501 clxscore=1015 malwarescore=0 mlxscore=0 mlxlogscore=999 impostorscore=0 phishscore=0 spamscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2408220000 definitions=main-2409240160 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Esha Bharadwaj Implement instance of snapshot function to dump new registers used for cwb Reviewed-by: Dmitry Baryshkov Signed-off-by: Esha Bharadwaj Signed-off-by: Jessica Zhang --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 9bcae53c4f45..47e304b357e8 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -989,6 +989,11 @@ static void dpu_kms_mdp_snapshot(struct msm_disp_state *disp_state, struct msm_k dpu_kms->mmio + cat->mdp[0].base, "top"); } + /* dump CWB sub-blocks HW regs info */ + for (i = 0; i < cat->cwb_count; i++) + msm_disp_snapshot_add_block(disp_state, cat->cwb[i].len, + dpu_kms->mmio + cat->cwb[i].base, cat->cwb[i].name); + /* dump DSC sub-blocks HW regs info */ for (i = 0; i < cat->dsc_count; i++) { base = dpu_kms->mmio + cat->dsc[i].base;