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Thu, 3 Oct 2024 15:01:41 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v6 16/44] drm/colorop: Introduce DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE Date: Thu, 3 Oct 2024 16:00:58 -0400 Message-ID: <20241003200129.1732122-17-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241003200129.1732122-1-harry.wentland@amd.com> References: <20241003200129.1732122-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF0000343E:EE_|SN7PR12MB7883:EE_ X-MS-Office365-Filtering-Correlation-Id: acfaedce-fd4b-4fe3-d033-08dce3e63454 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|36860700013|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: DoDrfNAJvGnzws9Gcu1Vy7l47i+SBNEWywK2BkIw8snx4n/LOMaH6r0HVnwDXavdwoxfjrhIeq0r2PkJVaOIxsTm3IW1EGAgLBAh7jGhL+fAWWY+dzh5PoT5Uo811nHt5oN5uoz/5IR4Ac+7iYo76I2+0s0IigcokYfIjrXY2iiEjyKoJyU+G3ZIZletn0D7eXXxunc+kIKk9+zQGcVeKyipn6cHOfdgtllePdLc8qBxetbBP5RwajsQF7QHqzRxE74T1Ma0R+QxyFuqc0CNv8wzTtJdyoXRTqkjBgTI0nMlKMI2kp57cT4ZzpoOg4IUgXkjooAAZICoxeGM8zXDjvbrMPMHQF86TGIQMntL3SpX/GF5SVo7Ye+2Hx/KHVFbYbWg/0zwoi2hA2Kngol0DUiQg4eQqeAGzavPxD9+7ub4gA1nwY5T6K5O5h4UlqUKNql1QdILJl0aNEZiWnH69ilGKbenPYDEcrxPgwcOC7mli2nn1k/pTUCqzC8Uy+x6qyCWmS4TZXIJYA9Q2s0l/uxOjt5/ViVm0X7RT3235+ybdLNUHRyHPKhho7mWxjHISVSVVl/Zm/K2KjQJR+wYATqOBZ2Z3C2+yzAQceHaKnhyy8FYGkvyUXDgo0EOVJVr4Zr2fbu/sFoFp5m1hXc4O4pvJU3w2fF0Gf2biSURiGpghCQ/Ynb+2SPR8iw/GYzw7OTE2jLv8FONi/1mx3FitOpAu/qaTKKwwy7A3lBzXaLDGsx4YkO506uw16BPukVAzmj2tS/VeFuYL2INJCfAtOdqP1uyHP6Fq/i4AgKEw4tp8+i08iGcLXeU2RIEQcqGPA3pzuYIidhyxnEx+4PaijYDfYOv5ZeREPRuyf2FcytcNNmEvdp3/wrupkVa3ic83GTB/DjlJrZDW4u0N4eJZVyWKmeapoJbqkmo3ovBQEzct+762didBub+/d/HgbWqDWxDGP10xkY7iCuoP65Ky/PaWFVqLtH2tn3XjMnb/AQ2awlly4Y3WNPxO9P1/rPOtSZ4uNgjVdZmc37mz+DsC7n9dZVOYNtgGKZNrgpcQAdUdrDXq5RSOi9kHuk+MJ1t0seBgMZjAp9DN+wz2z3EM7xkvNvNdVaU8s5xr7rkOUcpBbtF4aZO695uY+WSHaUKLNAsJXR+FH0gmTDqzVlp3t5/2e6ZAVCmuT7BwHStrsmZnlffGL0ZKoFSJQIW4W/law97p7Yn8osAA/U7cVxxVyWt1q3tc9WAa4r/1d6O8dgc8fuNkq0wcBvxSPqCw7wK73OuvZQqOeVn8iTHpaBCHBkj6vWlUm0bHLfPzkzhs5gHwQ9xYJ9asMzqsPrVR+ZZ2taaBTiT6FeA7srwYOPzRmS4H+Wwus3U2/BINuikDjJjzoKceHYzgebkVdDWdoP+ X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(376014)(36860700013)(1800799024)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Oct 2024 20:01:43.8474 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: acfaedce-fd4b-4fe3-d033-08dce3e63454 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF0000343E.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7883 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" With the introduction of the pre-blending color pipeline we can no longer have color operations that don't have a clear position in the color pipeline. We deprecate all existing plane properties. For upstream drivers those are: - COLOR_ENCODING - COLOR_RANGE Drivers are expected to ignore these properties when programming the HW. Setting of the COLOR_PIPELINE plane property or drm_colorop properties is only allowed for userspace that sets this client cap. Signed-off-by: Harry Wentland --- v5: - Fix kernel docs v4: - Don't block setting of COLOR_RANGE and COLOR_ENCODING when client cap is set drivers/gpu/drm/drm_atomic_uapi.c | 13 ++++++++++++- drivers/gpu/drm/drm_ioctl.c | 7 +++++++ include/drm/drm_file.h | 7 +++++++ include/uapi/drm/drm.h | 16 ++++++++++++++++ 4 files changed, 42 insertions(+), 1 deletion(-) -- 2.46.2 diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index c927aa65d286..a9a95431c31f 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -570,6 +570,12 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane, } else if (property == plane->color_range_property) { state->color_range = val; } else if (property == plane->color_pipeline_property) { + if (!file_priv->plane_color_pipeline) { + drm_dbg_atomic(dev, + "Setting COLOR_PIPELINE plane property not permitted unless DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE is set\n"); + return -EINVAL; + } + /* find DRM colorop object */ struct drm_colorop *colorop = NULL; colorop = drm_colorop_find(dev, file_priv, val); @@ -1179,6 +1185,12 @@ int drm_atomic_set_property(struct drm_atomic_state *state, break; } case DRM_MODE_OBJECT_COLOROP: { + if (!file_priv->plane_color_pipeline) { + drm_dbg_atomic(prop->dev, + "[OBJECT:%d] is a colorop but DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE not set\n", + obj->id); + ret = -EINVAL; + } struct drm_colorop *colorop = obj_to_colorop(obj); struct drm_colorop_state *colorop_state; @@ -1191,7 +1203,6 @@ int drm_atomic_set_property(struct drm_atomic_state *state, ret = drm_atomic_colorop_set_property(colorop, colorop_state, file_priv, prop, prop_value); - break; } default: diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c index 51f39912866f..6b5021b68e35 100644 --- a/drivers/gpu/drm/drm_ioctl.c +++ b/drivers/gpu/drm/drm_ioctl.c @@ -373,6 +373,13 @@ drm_setclientcap(struct drm_device *dev, void *data, struct drm_file *file_priv) return -EINVAL; file_priv->supports_virtualized_cursor_plane = req->value; break; + case DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE: + if (!file_priv->atomic) + return -EINVAL; + if (req->value > 1) + return -EINVAL; + file_priv->plane_color_pipeline = req->value; + break; default: return -EINVAL; } diff --git a/include/drm/drm_file.h b/include/drm/drm_file.h index 8c0030c77308..6d9a1578c7dc 100644 --- a/include/drm/drm_file.h +++ b/include/drm/drm_file.h @@ -206,6 +206,13 @@ struct drm_file { */ bool writeback_connectors; + /** + * @plane_color_pipeline: + * + * True if client understands plane color pipelines + */ + bool plane_color_pipeline; + /** * @was_master: * diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h index 16122819edfe..a2fc85ecdea1 100644 --- a/include/uapi/drm/drm.h +++ b/include/uapi/drm/drm.h @@ -875,6 +875,22 @@ struct drm_get_cap { */ #define DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT 6 +/** + * DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE + * + * If set to 1 the DRM core will allow setting the COLOR_PIPELINE + * property on a &drm_plane, as well as drm_colorop properties. + * + * Drivers will ignore these drm_plane properties: + * - COLOR_ENCODING + * - COLOR_RANGE + * + * The client must enable &DRM_CLIENT_CAP_ATOMIC first. + * + * This capability is currently in development. + */ +#define DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE 7 + /* DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */ struct drm_set_client_cap { __u64 capability;