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Thu, 3 Oct 2024 15:01:50 -0500 From: Harry Wentland To: , CC: , Harry Wentland Subject: [PATCH v6 31/44] drm/amd/display: Enable support for PQ 125 EOTF and Inverse Date: Thu, 3 Oct 2024 16:01:13 -0400 Message-ID: <20241003200129.1732122-32-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241003200129.1732122-1-harry.wentland@amd.com> References: <20241003200129.1732122-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF0000343D:EE_|IA1PR12MB7494:EE_ X-MS-Office365-Filtering-Correlation-Id: 776caaa2-c703-4b73-7749-08dce3e6391a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|1800799024|82310400026|376014; X-Microsoft-Antispam-Message-Info: ZwR9Bj7CLzaJ64gFafYH3XmAVvWwZ/HZr2MUQSFpw6UIFQJ12wxhZWBeUDv48220x7dyaTcF9NlZSp5JaKR7DUilD4LLxRzLn66n70+JV14RL/RKy24gAi5ADdFun/pzf+h2NleGYuV5bATYiEabgeSRAWeiFOM58V8s9i2V1CMbDSJUk2Hbk0wrpe+9rgmudZchm8WfoZ1xm6f8Zw6ICd1FavYbzWEYgW7H5XIEERGoeJyQ/Cj/sWhUKGVfcifRchCH+cX+giGbxmsSBjPcko8EL7nLVGt55PpE0a9IUH9RCfAjW0J/7zuJ9QF2nInAcEYMPXESA+/h7S+/tu/gBxKOPpENKIz9j5RCFFleefnc1ICkMdXWGJLW1VRz+TJJtsVZ7vLWS4iZAX7YKITn5H8SXVJJceQiwcl22hVzlOx+4bWiXBCSF9DsD7U4NrxVN4VGNvPlOkhFgisORCckXPIcAI5EwQNma832wiJ2bFRuasaIRdzknyCK9QxD7Ts8HXRTwS6/Oxhwt2wVkkl3P1/oS03JN/A3EYHL1TRGv79Ne37Lx4MiUE17LJe4z6F4Puc7poAXIag4eTfMy16nNA/qF/uRHMJvuKcGAW1OOhP5uxoKnjZnr6DAFnA1Bv9OERj/S4WyvgIqGaZNOJuoPa5YZTy0BVr+Zv4+estSMCwYV/I3WBksgVKUdka9NTNhZqBJJl8VNw2p3ch+bmOdxai0P+Nwuqo820LqqB0PMuHuxohaCbyh67oVuXZT1F9AnHophcwlwfm8ZpJ2iVhzm56KFym3Qw5z9zxoXz5ts+2FAwworJZgJVQXTGWx8BauNH4G570t+lz1SbB9d1tug1ZURq/XHIMgyaGW3PUe67mj5zRgkC94EdEBZneVH28Ae5GaDJH4C7ZoXL5vGs4bEtyJeXQ7plSth4WmcnOhGe8LQV7UJS/UnnMe6MlQPgNLzYwhqNLJKXNo4RaHP8bnnLNHwqZxjabWu8xWdbHUBIfrwRw5v/1yzJbN6s1ehJmlF27cz1fh0gCorw6d9Cf6aBOvnAgZkCCg/F9ZIKTba0xZyxVdutMihbPqhuQO3ZahpYuVCNwCMaZ67bE9/dNdfRPer9PM6VjWZjIZpciFGXSMzZah+dhtX70YXHETxwpk8sLBZo0TR6M+BWQBm08Uvfdv0iBYeNo5/rmUjqZEcW084dwxQMFotH/w47ILy/ifuiEAR5m6w+bPob96TpaQbJkNPE19s2nQOiCsHl0hFwZ4k/iku9TrCkyOguTQRxajJuFOhoEiSKjtE7XefDoxZ+0cN2rqY+5xm5Ogh63KRgSfoor5yL82OCa6ppjHDVGCUG2uQVnVmGD80GZPlVeXD3Q0qVFTGVjuiSpfr7TtZbm57b6YNGwphA91m8FYNREb X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Oct 2024 20:01:51.8536 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 776caaa2-c703-4b73-7749-08dce3e6391a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF0000343D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7494 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This patchset enables support for the PQ_125 EOTF and its inverse on all existing plane 1D curve colorops, i.e., on DEGAM, SHAPER, and BLND blocks. With this patchset the following IGT subtests are passing: kms_colorop --run plane-XR30-XR30-pq_125_eotf kms_colorop --run plane-XR30-XR30-pq_125_inv_eotf kms_colorop --run plane-XR30-XR30-pq_125_eotf-pq_125_inv_eotf kms_colorop --run plane-XR30-XR30-pq_125_eotf-pq_125_inv_eotf-pq_125_eotf Signed-off-by: Harry Wentland --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 20 +++++++++++++------ .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 6 ++++-- 2 files changed, 18 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index f0dac44d97b3..d4ef20bc2be5 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -25,6 +25,7 @@ #include "amdgpu.h" #include "amdgpu_mode.h" #include "amdgpu_dm.h" +#include "amdgpu_dm_colorop.h" #include "dc.h" #include "modules/color/color_gamma.h" #include "basics/conversion.h" @@ -676,6 +677,9 @@ amdgpu_colorop_tf_to_dc_tf(enum drm_colorop_curve_1d_type tf) case DRM_COLOROP_1D_CURVE_SRGB_EOTF: case DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF: return TRANSFER_FUNCTION_SRGB; + case DRM_COLOROP_1D_CURVE_PQ_125_EOTF: + case DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF: + return TRANSFER_FUNCTION_PQ; default: return TRANSFER_FUNCTION_LINEAR;; } @@ -1158,8 +1162,10 @@ __set_colorop_in_tf_1d_curve(struct dc_plane_state *dc_plane_state, struct drm_colorop *colorop = colorop_state->colorop; struct drm_device *drm = colorop->dev; - if (colorop->type != DRM_COLOROP_1D_CURVE && - colorop_state->curve_1d_type != DRM_COLOROP_1D_CURVE_SRGB_EOTF) + if (colorop->type != DRM_COLOROP_1D_CURVE) + return -EINVAL; + + if (!(BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_degam_tfs)) return -EINVAL; if (colorop_state->bypass) { @@ -1191,7 +1197,7 @@ __set_dm_plane_colorop_degamma(struct drm_plane_state *plane_state, /* 1st op: 1d curve - degamma */ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { if (new_colorop_state->colorop == old_colorop && - new_colorop_state->curve_1d_type == DRM_COLOROP_1D_CURVE_SRGB_EOTF) { + (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_degam_tfs)) { colorop_state = new_colorop_state; break; } @@ -1211,8 +1217,10 @@ __set_colorop_in_shaper_1d_curve(struct dc_plane_state *dc_plane_state, struct drm_colorop *colorop = colorop_state->colorop; struct drm_device *drm = colorop->dev; - if (colorop->type != DRM_COLOROP_1D_CURVE && - colorop_state->curve_1d_type != DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) + if (colorop->type != DRM_COLOROP_1D_CURVE) + return -EINVAL; + + if (!(BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_shaper_tfs)) return -EINVAL; if (colorop_state->bypass) { @@ -1248,7 +1256,7 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state, /* 2nd op: 1d curve - shaper */ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { if (new_colorop_state->colorop == old_colorop && - new_colorop_state->curve_1d_type == DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) { + (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_shaper_tfs)) { colorop_state = new_colorop_state; break; } diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index 7f58c7b6a1e0..0578f33c8422 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -32,10 +32,12 @@ #include "amdgpu_dm_colorop.h" const u64 amdgpu_dm_supported_degam_tfs = - BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF); + BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) | + BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF); const u64 amdgpu_dm_supported_shaper_tfs = - BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF); + BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) | + BIT(DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF); const u64 amdgpu_dm_supported_blnd_tfs = BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF);