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Thu, 3 Oct 2024 15:01:53 -0500 From: Harry Wentland To: , CC: , Alex Hung , Harry Wentland Subject: [PATCH v6 36/44] drm/amd/display: add 3x4 matrix colorop Date: Thu, 3 Oct 2024 16:01:18 -0400 Message-ID: <20241003200129.1732122-37-harry.wentland@amd.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241003200129.1732122-1-harry.wentland@amd.com> References: <20241003200129.1732122-1-harry.wentland@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: harry.wentland@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF0000343D:EE_|DM4PR12MB6009:EE_ X-MS-Office365-Filtering-Correlation-Id: 510f1706-2708-4e21-f7a1-08dce3e63b83 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|82310400026|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: jA4pbgP3dCm3WqwTUvYv9O6EWrcM5mrkE709xIXaA1TEW1nfk5GXEN+HS3AYBJTEUMSpz5dJM32c/xGnP0H+9c9/trneEajyouJXkuXVU2V3RtK7PRnbcor2Vge/OjgxPilL6egPF4Aht2Fxoc7LxwYlsmBkACPYN1l+C6BMeukOz34i759GnR2dkT1osRx0nN7w0wOnm4kPTNl/WG4/kAXwUWavuSN1n8GSAJ86kntD5JdtsMj4GRK8imO6uUsNA2Y8c//tfneOckQ0vF0G5YNKXwO2nuy7JU8GVTzOjEiXlmjzBXa9gAQ9b2/5j6knVVTVU+EDPmQHwDaGvdWcLKuNoUSAbZs9C3wX+8s1FzDSugTQucoXWFNjdEnlaAwLW66VcG4RK7DEhxkVFrgBQGP223Z1On/y4m7Hgz5dg5+aBcymjhwLaxbHmyCnNDvCN57AVgLwLR7BXnmyWZNHXTt4t7/0T659Vc/qjVFpNgj4nPUAtOgix0yIBkWcGBU75GsuuQALqEltr+UnM6G5uTa6eyRhugOsKdYoIkVx6eAaQ1JGNAqnMbvmPFtftqpnYp8CiKDDxmfqJINng99RZLNJV5tB7XOQU+Lp8YvFgowQDDezGEvym6TbSi88BaGGw4OTzmYawVHqaZ20Kw9Yj5qI/DmaFxDHEUlmNnlqMRnA0pXYf1oAZFo1LkK1pN1NlVxVrAU9HFymV7nqu5HyAxlEQBTGtyQXje8HvR90RN4mZ48zjIckilE8QpTgDRY+LTfnJ8ErRU+6Bo0oTXV8RNH6y6jvUNfk5GDzbJU/0KruRUJCO4h2PTBdIVYvVXC8aaatnosOCuukfz9Dd6XnE4ovCXMgQrefrVm5rJyIbhTdEVa3snkRknKjfh8eSYguB+HDJEx6WyJwj9zRRfK3KYOGvqYV4KxT0h1t+hVmsqm402IWflGShxqdxsPQ4nGtJNkAxZUxAYauaQN+GncAxa2pxZc0/3Ll0R5HhvXoEvmuE6X5gOe6MmlcjD2gFc2ZQZMU1vy6p5NFFXIn5Bs1xCDvR/pVoassM1zmXvI4JVqnZCYSxgStM5/Y3bob5LNNZuS04VAaEM0Ix3nirjMvTQeqTCrPv0R9uIF7co0gYWgBZsL7ADZiLvbDjQ1S6rJsVL/ltKU6lXzO5xtyCGMhxvdhX7nFdkEke3gw8Ux9Es0PUiDVbLhhc4ytNRocVDEThQVZ6flxOfRrTgcjr578xQ9vIZH/lj7SWNPSPYtqlqhFA7igxKg6dr1zDagp5jOofZbMvNJxZ0+ECyyvvDiHTxRr2t28jRrfCaFcsLrDUUXGMIJq26/jh/KDfa1R9BGY7bA+Af0i9ROQeZlY0fl1io+QOZKCP4+b0+6+Ozn8PlJhjWSgNkdgMnxg9KWbQYKR X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(376014)(82310400026)(36860700013)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Oct 2024 20:01:55.9317 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 510f1706-2708-4e21-f7a1-08dce3e63b83 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF0000343D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6009 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Alex Hung This adds support for a 3x4 color transformation matrix. With this change the following IGT tests pass: kms_colorop --run plane-XR30-XR30-ctm_3x4_50_desat kms_colorop --run plane-XR30-XR30-ctm_3x4_overdrive kms_colorop --run plane-XR30-XR30-ctm_3x4_oversaturate kms_colorop --run plane-XR30-XR30-ctm_3x4_bt709_enc kms_colorop --run plane-XR30-XR30-ctm_3x4_bt709_dec The color pipeline now consists of the following colorops: 1. 1D curve colorop 2. 3x4 CTM 3. 1D curve colorop 4. 1D LUT 5. 1D curve colorop 6. 1D LUT Signed-off-by: Alex Hung Signed-off-by: Harry Wentland --- v6: - fix warnings in dbg prints .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 50 +++++++++++++++++++ .../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 16 ++++++ 2 files changed, 66 insertions(+) -- 2.46.2 diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index 10c7a37262ec..9861e2608d16 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -1212,6 +1212,45 @@ __set_dm_plane_colorop_degamma(struct drm_plane_state *plane_state, return __set_colorop_in_tf_1d_curve(dc_plane_state, colorop_state); } +static int +__set_dm_plane_colorop_3x4_matrix(struct drm_plane_state *plane_state, + struct dc_plane_state *dc_plane_state, + struct drm_colorop *colorop) +{ + struct drm_colorop *old_colorop; + struct drm_colorop_state *colorop_state = NULL, *new_colorop_state; + struct drm_atomic_state *state = plane_state->state; + const struct drm_device *dev = colorop->dev; + const struct drm_property_blob *blob; + struct drm_color_ctm_3x4 *ctm = NULL; + int i = 0; + + /* 3x4 matrix */ + old_colorop = colorop; + for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) { + if (new_colorop_state->colorop == old_colorop && + new_colorop_state->colorop->type == DRM_COLOROP_CTM_3X4) { + colorop_state = new_colorop_state; + break; + } + } + + if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_CTM_3X4) { + drm_dbg(dev, "3x4 matrix colorop with ID: %d\n", colorop->base.id); + blob = colorop_state->data; + if (blob->length == sizeof(struct drm_color_ctm_3x4)) { + ctm = blob ? (struct drm_color_ctm_3x4 *) blob->data : NULL; + __drm_ctm_3x4_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix); + dc_plane_state->gamut_remap_matrix.enable_remap = true; + dc_plane_state->input_csc_color_matrix.enable_adjustment = false; + } else + drm_warn(dev, "blob->length (%lu) isn't equal to drm_color_ctm_3x4 (%lu)\n", + blob->length, sizeof(struct drm_color_ctm_3x4)); + } + + return 0; +} + static int __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state, struct dc_plane_state *dc_plane_state, @@ -1411,6 +1450,17 @@ amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state, if (ret) return ret; + /* 3x4 matrix */ + colorop = colorop->next; + if (!colorop) { + drm_dbg(dev, "no 3x4 matrix colorop found\n"); + return -EINVAL; + } + + ret = __set_dm_plane_colorop_3x4_matrix(plane_state, dc_plane_state, colorop); + if (ret) + return ret; + /* 1D Curve & LUT - SHAPER TF & LUT */ colorop = colorop->next; if (!colorop) { diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c index d2423b98da15..9152f0a771ef 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c @@ -75,6 +75,22 @@ int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_pr i++; + /* 3x4 matrix */ + ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); + if (!ops[i]) { + DRM_ERROR("KMS: Failed to allocate colorop\n"); + ret = -ENOMEM; + goto cleanup; + } + + ret = drm_colorop_ctm_3x4_init(dev, ops[i], plane); + if (ret) + goto cleanup; + + drm_colorop_set_next_property(ops[i-1], ops[i]); + + i++; + /* 1D curve - SHAPER TF */ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL); if (!ops[i]) {