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Sat, 12 Oct 2024 07:37:01 +0000 Received: from AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::d1ce:ea15:6648:6f90]) by AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::d1ce:ea15:6648:6f90%4]) with mapi id 15.20.8048.020; Sat, 12 Oct 2024 07:37:01 +0000 From: Liu Ying To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, catalin.marinas@arm.com, will@kernel.org, quic_bjorande@quicinc.com, geert+renesas@glider.be, dmitry.baryshkov@linaro.org, arnd@arndb.de, nfraprado@collabora.com, o.rempel@pengutronix.de, y.moog@phytec.de, marex@denx.de, isaac.scott@ideasonboard.com, biju.das.jz@bp.renesas.com Subject: [PATCH v2 2/9] arm64: dts: imx8mp-phyboard-pollux-rdk: Add panel-timing node to panel-lvds node Date: Sat, 12 Oct 2024 15:35:36 +0800 Message-Id: <20241012073543.1388069-3-victor.liu@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241012073543.1388069-1-victor.liu@nxp.com> References: <20241012073543.1388069-1-victor.liu@nxp.com> X-ClientProxiedBy: SI2PR01CA0051.apcprd01.prod.exchangelabs.com (2603:1096:4:193::6) To AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM7PR04MB7046:EE_|DB8PR04MB6986:EE_ X-MS-Office365-Filtering-Correlation-Id: 16e09e84-f9c7-4048-8be7-08dcea90a8fa X-LD-Processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM7PR04MB7046.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(1800799024)(7416014)(376014)(366016)(52116014)(38350700014); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: RlzAyf8/Tf7QNARSYwPLoMmLWoLkq2hRnkU3yyI2fqquXw7QDz7eKwgaGWxlWKB/sZf+QTt8yYVH+kUnOqc1fD1708O38XZChmnBl7q5swO8HiA3p6b0jHN4VDcBfzNpvdUo29hyFMG6LZ+BCbsHwpYIch1Te3ebJU1FahftUv1brv8pLR7bJf5TwgjaYG0/1ZhlvQXj05Gi9G8A4u1GbOA88An9QrQ7D28d/6X0E1/PHxPzu+MvbhLEXLDX+RnV1UniJQKHny1R+9Caa8+aYjFMUw0jncQv1n0coWXXW6Ra/fqnkKIjjL+4HE9iwcsjCn67Gf99RI/iHigCTmypp1ghhnup5NKPFEsBMl/gXuwgAWuiDjoPr5f0aVqg6+FuQNrtop0xY4VSkxTSBHZ+7IrBXK5Z/+Xbs3KPPhPonLrNFguty+ctsvYBLcLmh8znjbhOtDk/yC1lVMrBVtFt0pCGVRKJVtYywblKulM6WbjTSqXsKzQH8TsnXN+nNT/HrRFlFY+2bgETJjK2YKxKlzZ7GRBu4MpiNuQSKrvywKx1kPo2vNHh2T0Ye7MlZxDbtfANGannIbVPsz1GDJKHifzlRWGdI6e9ypPB/qbvgfYUXQHMYP+86F7k0ivNBOc9rLH2kHX/lGTHtVR/7ydB8FwF1tfWpNi2/mM5kkbeQLehcbQAJgXjq6Dpgovy64fD7InFzevBf1cNTEF3+5MYfsgAicTkCGb8Cui286X5nCkduyytPbpneO/wjyPVqX2gpjK6+lHIuRDnBvzZWdzqGodgeWK9A/0AZf0EzKqrsAFqRG9rPQpVC0h4w/7WXKHMCGmmB2ZPi/UZcZyeptLwWxi6sVlkvTiPEOXUfGxna005f0AR1/AgCGCgLupGN6wDyiu7IoRUFYIDgoIcyNK9GddJPpLvFAFV6AmrmWuBr4Gn+JYQ82vER0eds/OfO8lraNDjckVIYCGgNSP3XpJaJxOvkvSmy0bduGgJUPMJ4/HZ859UCiK+brdmTENIHtqLN+F/IzfyTTxi7bNE1Xuis0dA9ygjORjsYhwcgsDHFxuRw59b7tJx0wOjOwFJIhQ4UfLh2THz0n9GhEhbVsrxzXnlkOuuPzkpYVEteKxZyqgkfDgzSwC7OAasG9jrBkaYw/lz/SRsnHCYWDrSvXjQ1vGP7UtdfUCEvNg2k/vIpgmh8H2rftYYnDQSp3T5GVZJgDaDhx3W4q6HA+PsWtXO4BAGi79nhW49gbHq7sL+AmyjMHcztbGD7/a90eKBsYFthDQqXQtyWPojJCvurzH32xszf2owwJWRYDlSgbwKHduDXiWpau852l6SGfEt2gGBmTaG/kBh5OYj/JilpgueZN9kW7blc2RzFrtuyBQyqGTieF6tidbRGm9UzQ2I30eMvoLUK/ve9snyc0vICO3MUpfoLJjnzXDPrFxbiL2aQsTkxoTKqy1j4IKiBcJc7aCvJNaiw/GOIo+UsQswHM6SoWPp5hg6HyRwnPpy+/8uJrHJDSUivI6APXIJButKb1a6ujrGj2pNp4AY3SJuGxMBdLeX8oyJsafn6Vb+349yUO6x6vLEpv2zSzjX5z8XkEX8 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 16e09e84-f9c7-4048-8be7-08dcea90a8fa X-MS-Exchange-CrossTenant-AuthSource: AM7PR04MB7046.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Oct 2024 07:37:01.3522 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: P3xThv+tGzpq9EJ5L1YMFl6BtWJDA0bxmHVIlgSMu4IGfo7K9tIDsWDqrU4ig/HaeHwYgtHmhjqEu8rkvq3kUg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8PR04MB6986 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add a panel-timing node to panel-lvds node to override any fixed display modes written in a panel driver. This way, 74.25MHz clock frequency specified in panel-timing node may accommodate 7-fold 519.75MHz "media_ldb" clock which is derived from 1.0395GHz "video_pll1" clock. This should suppress this LDB driver warning: [ 17.923709] fsl-ldb 32ec0000.blk-ctrl:bridge@5c: Configured LDB clock (72400000 Hz) does not match requested LVDS clock: 506800000 Hz This also makes the display mode used by the panel pass mode validation against pixel clock rate and "media_ldb" clock rate in a certain display driver. Fixes: 326d86e197fc ("arm64: dts: imx8mp-phyboard-pollux-rdk: add etml panel support") Signed-off-by: Liu Ying --- v2: * No change. .../dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts index 50debe821c42..20cb5363cccb 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts @@ -37,6 +37,21 @@ panel1_lvds: panel-lvds { backlight = <&backlight_lvds>; power-supply = <®_vcc_3v3_sw>; + panel-timing { + clock-frequency = <74250000>; + hactive = <1280>; + vactive = <800>; + hfront-porch = <72>; + hback-porch = <86>; + hsync-len = <2>; + vfront-porch = <15>; + vback-porch = <21>; + vsync-len = <2>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + }; + port { panel1_in: endpoint { remote-endpoint = <&ldb_lvds_ch1>;