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mx.microsoft.com 1; spf=pass smtp.mailfrom=starfivetech.com; dmarc=pass action=none header.from=starfivetech.com; dkim=pass header.d=starfivetech.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=starfivetech.com; Received: from NTZPR01MB1050.CHNPR01.prod.partner.outlook.cn (2406:e500:c510:1::6) by NTZPR01MB1100.CHNPR01.prod.partner.outlook.cn (2406:e500:c510:8::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8158.24; Wed, 20 Nov 2024 06:20:28 +0000 Received: from NTZPR01MB1050.CHNPR01.prod.partner.outlook.cn ([fe80::512d:38d7:ed9f:dfbe]) by NTZPR01MB1050.CHNPR01.prod.partner.outlook.cn ([fe80::512d:38d7:ed9f:dfbe%4]) with mapi id 15.20.8158.023; Wed, 20 Nov 2024 06:20:27 +0000 From: keith zhao To: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org Cc: andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hjc@rock-chips.com, heiko@sntech.de, andy.yan@rock-chips.com, william.qiu@starfivetech.com, xingyu.wu@starfivetech.com, kernel@esmil.dk, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, p.zabel@pengutronix.de, changhuang.liang@starfivetech.com, keith.zhao@starfivetech.com, jack.zhu@starfivetech.com, linux-kernel@vger.kernel.org Subject: [PATCH v5 5/9] drm/vs: Add Base API for VS Mode Configuration Date: Wed, 20 Nov 2024 14:18:44 +0800 Message-Id: <20241120061848.196754-6-keith.zhao@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241120061848.196754-1-keith.zhao@starfivetech.com> References: <20241120061848.196754-1-keith.zhao@starfivetech.com> X-ClientProxiedBy: BJXPR01CA0059.CHNPR01.prod.partner.outlook.cn (2406:e500:c211:12::26) To NTZPR01MB1050.CHNPR01.prod.partner.outlook.cn (2406:e500:c510:1::6) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: NTZPR01MB1050:EE_|NTZPR01MB1100:EE_ X-MS-Office365-Filtering-Correlation-Id: d3f877aa-58f3-468e-f678-08dd092b6cf0 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; 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SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 5xj0nxzFcqXfwO1dOgEggzEU07R5kl9U9849UAFJl0Znhu6a3td2y5HWrVckT0R5EO/GyP+9zNf5ozv2/WT1b6m8vEvX0ztwoVRM3k4bVYt8E6eSFTf+P1c3kO9QTTX5x56xbjlPCo2DCJxGiendMu5EvfH9u/otEDOCd8FkiHZxPXvwKLRjJ0Wa6SFW6IZFS8p1s8sA+lGOmz9hQnnt/bQigpzihXvzHy14X9hOCTTg0Eb8okYhiVcJmFO+4X53hjaTmERjvtseLdqD6e07pFG/oBNCsYhmshjfHTX44zN5PisQ/lU2hzckRLEsN5wGo65bcI9OWjWJqawcBFoBgunQfDXsrfo0jqTBdtTQIh+GUHkLBrzOVyK/N+DZAbrGKWtU8uzwpPahgUoohGzRCpawXJZ+ZJ7tS1pxlFon/TTfGZ4Zu+m7ooit1BVcNBsZZ9WIAAEi4xdJSeseGLkHpJwqXmkoPOB7BoKrxRGMviW6LuQEHr68wyVhpU2iL2ZEXn1lI+JGeyrCpTMymSxITol1TWmWGwi17KG5aFx+OQnxCS+41YI8dTLaiN1TzkIMDIiDsfeKZDApCAccYacN7zMW1i+mLysM1Kwgu40wkdsXlRqgNKccEYGpfNTi7HQ1bd9hZsqVqo0dSLMBNCgByvK/Jzrs/wb2axptBWsDdau2UJMG4fVY836wcjvGICQBHU7BrQKJRHo8kssugHJ/zmfxCGMziJATZcCvGxoOSPCyokf2F14L5k3yuQ9Bs48YotCi4ajXmbEDgIIG1EbCp3n1pw/Yz28Z9tTDvr8vWcpzK5bOsCtGemdAVNF4GDCS7FuNPrf0i4Md3qjNr8+3grSWfp7cblif7QEJfE8Xtw+JrLwQj3FmmAkvlp9OVZcqaKWG2WZ+ERG2w0PcyD63Esd34cHrU2D62CMpmYVtWRu6LeDoafiglAJkDoQ6V0UBncHv4sjwE1L4gOM+qKD8ncI8eOf/HXnY9p5eFGpycRWquVaijtZaacjsdg8MnQR/w8yRJfwIwK9CQlHz3NhifeGLun+Wt1O7yJ1jesESqLTlO+WwekdTMDNOmG5tq/6FXgjeSXhoqNpkyke71I2yqpPjXSXjn0w5hqwcI0V/2/gc/Wm+40WJHcIGMsuVESZabocNeTx1IpvCpA+QF7OXtxlDl3eQ31o80DQmrApWcjF//8bCC1Ujzzb4IGmHm5uRKIxd0Y2se2judRgxJTpZx141jUq4ww5YimgMydOlgWTjrtaXNR/ukSFGYsJ25+ikU8D1jYSDnthJBv5DC8Lc+Ji+Ypge4ufFNAMGVyKPP7jmIhHTuuRJXN2ZhFv28yFALKM+HUjonHw3TqldaORGo4KL0wJ9+qEtMhkLgwEKmmp/GFppsqKQMdnJZGqN0alq6NlIG46Fp6YJPB/xAL/baklV0NgfkD9no4qFnUFf8p360lObcBUsfvWL7XSVwgZLxqgXwfVsYqxrDlvBUWOvXvVovIjdoYnvteo6xz+/OxEi0IuLnxkgq/SLTRkIjah88LBKE4OHz+HDO5shkYf8Ih5xGkaWt6X92VawUbBwt8A75sXr4UO9U0C+Kp9koGuhNtENsTdqD2rSiHWnieVusQ== X-OriginatorOrg: starfivetech.com X-MS-Exchange-CrossTenant-Network-Message-Id: d3f877aa-58f3-468e-f678-08dd092b6cf0 X-MS-Exchange-CrossTenant-AuthSource: NTZPR01MB1050.CHNPR01.prod.partner.outlook.cn X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Nov 2024 06:20:27.4107 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 06fe3fa3-1221-43d3-861b-5a4ee687a85c X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: bjffdVfBlNtpbirTUyREcfOQS28VohGVcGpJYS/VUH+kDm1pWPOa1xMJtybPTiDOrABvFR2dpqJwHGuP0E/eFhQ7JRPMzIG7QqnR2LrtAIc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: NTZPR01MB1100 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This commit adds a base API for configuring VS modes, which will streamline the setup and management of display modes in the VS DRM subsystem. In this implementation, we are using drm_atomic_helper_commit_tail_rpm() instead of drm_atomic_helper_commit_tail() to ensure that we skip planes related to inactive CRTCs. This helps to optimize the commit process and reduces unnecessary overhead when dealing with inactive display resources. Signed-off-by: keith zhao --- drivers/gpu/drm/verisilicon/Makefile | 3 ++- drivers/gpu/drm/verisilicon/vs_modeset.c | 31 ++++++++++++++++++++++++ drivers/gpu/drm/verisilicon/vs_modeset.h | 10 ++++++++ 3 files changed, 43 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/verisilicon/vs_modeset.c create mode 100644 drivers/gpu/drm/verisilicon/vs_modeset.h diff --git a/drivers/gpu/drm/verisilicon/Makefile b/drivers/gpu/drm/verisilicon/Makefile index 7da54b259940..842867dad4cb 100644 --- a/drivers/gpu/drm/verisilicon/Makefile +++ b/drivers/gpu/drm/verisilicon/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 -vs_drm-objs := vs_dc_hw.o +vs_drm-objs := vs_dc_hw.o \ + vs_modeset.o obj-$(CONFIG_DRM_VERISILICON_DC8200) += vs_drm.o diff --git a/drivers/gpu/drm/verisilicon/vs_modeset.c b/drivers/gpu/drm/verisilicon/vs_modeset.c new file mode 100644 index 000000000000..0873a3465143 --- /dev/null +++ b/drivers/gpu/drm/verisilicon/vs_modeset.c @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) VeriSilicon Holdings Co., Ltd. + */ +#include +#include +#include + +#include "vs_modeset.h" + +static const struct drm_mode_config_funcs vs_mode_config_funcs = { + .fb_create = drm_gem_fb_create, + .atomic_check = drm_atomic_helper_check, + .atomic_commit = drm_atomic_helper_commit, +}; + +static struct drm_mode_config_helper_funcs vs_mode_config_helpers = { + .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, +}; + +void vs_mode_config_init(struct drm_device *dev) +{ + int ret; + + ret = drmm_mode_config_init(dev); + if (ret) + return; + + dev->mode_config.funcs = &vs_mode_config_funcs; + dev->mode_config.helper_private = &vs_mode_config_helpers; +} diff --git a/drivers/gpu/drm/verisilicon/vs_modeset.h b/drivers/gpu/drm/verisilicon/vs_modeset.h new file mode 100644 index 000000000000..bd04f81d2ad2 --- /dev/null +++ b/drivers/gpu/drm/verisilicon/vs_modeset.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2020 VeriSilicon Holdings Co., Ltd. + */ + +#ifndef __VS_MODESET_H__ +#define __VS_MODESET_H__ + +void vs_mode_config_init(struct drm_device *dev); +#endif /* __VS_FB_H__ */