@@ -848,6 +848,28 @@ static const struct drm_plane_funcs i8xx_plane_funcs = {
.format_mod_supported = i8xx_plane_format_mod_supported,
};
+static void i9xx_disable_tiling(struct intel_plane *plane)
+{
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
+ struct intel_plane_state *plane_state = to_intel_plane_state(plane->base.state);
+ u32 dspcntr;
+
+ dspcntr = intel_de_read_fw(dev_priv, DSPCNTR(dev_priv, i9xx_plane));
+ dspcntr &= ~DISP_TILED;
+ intel_de_write_fw(dev_priv, DSPCNTR(dev_priv, i9xx_plane), dspcntr);
+
+ if (DISPLAY_VER(dev_priv) >= 4) {
+ u32 reg;
+
+ reg = intel_de_read_fw(dev_priv, DSPSURF(dev_priv, i9xx_plane));
+ intel_de_write_fw(dev_priv, DSPSURF(dev_priv, i9xx_plane), reg);
+
+ } else
+ intel_de_write_fw(dev_priv, DSPADDR(dev_priv, i9xx_plane),
+ intel_plane_ggtt_offset(plane_state));
+}
+
struct intel_plane *
intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
{
@@ -973,6 +995,8 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
plane->disable_flip_done = ilk_primary_disable_flip_done;
}
+ plane->disable_tiling = i9xx_disable_tiling;
+
modifiers = intel_fb_plane_get_modifiers(dev_priv, INTEL_PLANE_CAP_TILING_X);
if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
@@ -1482,6 +1482,8 @@ struct intel_plane {
bool async_flip);
void (*enable_flip_done)(struct intel_plane *plane);
void (*disable_flip_done)(struct intel_plane *plane);
+ /* For drm_panic */
+ void (*disable_tiling)(struct intel_plane *plane);
};
#define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state, base)
drm_panic draws in linear framebuffer, so it's easier to re-use the current framebuffer, and disable tiling in the panic handler, to show the panic screen. Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com> --- drivers/gpu/drm/i915/display/i9xx_plane.c | 24 +++++++++++++++++++ .../drm/i915/display/intel_display_types.h | 2 ++ 2 files changed, 26 insertions(+)