Message ID | 20241205-dp_mst-v1-2-f8618d42a99a@quicinc.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
Return-Path: <dri-devel-bounces@lists.freedesktop.org> X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2630DE77170 for <dri-devel@archiver.kernel.org>; Fri, 6 Dec 2024 04:33:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BAFAF10E5F2; Fri, 6 Dec 2024 04:33:04 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=quicinc.com header.i=@quicinc.com header.b="K6FdZkm3"; dkim-atps=neutral Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8A55210E3D7; Fri, 6 Dec 2024 04:33:03 +0000 (UTC) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4B5HaedB018663; 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Fri, 6 Dec 2024 04:32:25 GMT Received: from abhinavk-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 5 Dec 2024 20:32:25 -0800 From: Abhinav Kumar <quic_abhinavk@quicinc.com> Date: Thu, 5 Dec 2024 20:31:33 -0800 Subject: [PATCH 02/45] drm/msm/dp: disable the opp table request even for dp_ctrl_off_link() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20241205-dp_mst-v1-2-f8618d42a99a@quicinc.com> References: <20241205-dp_mst-v1-0-f8618d42a99a@quicinc.com> In-Reply-To: <20241205-dp_mst-v1-0-f8618d42a99a@quicinc.com> To: Rob Clark <robdclark@gmail.com>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, Sean Paul <sean@poorly.run>, Marijn Suijten <marijn.suijten@somainline.org>, David Airlie <airlied@gmail.com>, "Simona Vetter" <simona@ffwll.ch>, Stephen Boyd <swboyd@chromium.org>, "Chandan Uddaraju" <chandanu@codeaurora.org>, Guenter Roeck <groeck@chromium.org>, Kuogee Hsieh <quic_khsieh@quicinc.com>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konradybcio@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org> CC: Vara Reddy <quic_varar@quicinc.com>, Rob Clark <robdclark@chromium.org>, Tanmay Shah <tanmay@codeaurora.org>, <linux-arm-msm@vger.kernel.org>, <dri-devel@lists.freedesktop.org>, <freedreno@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, Jessica Zhang <quic_jesszhan@quicinc.com>, Laurent Pinchart <laurent.pinchart@ideasonboard.com>, Abhinav Kumar <quic_abhinavk@quicinc.com> X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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Series |
drm/msm/dp: Add MST support for MSM chipsets
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On Thu, Dec 05, 2024 at 08:31:33PM -0800, Abhinav Kumar wrote: > dp_ctrl_off_link() was created to handle a case where we received > a cable connect and then get a cable disconnect without the corresponding > dp_display_enable(). For such cases the pixel clock will be off but the > link clock will still be on. dp_ctrl_off_link() handles this case by > turning off the link clock only. > > However, the vote removal to the opp table for this case was missed. > Remove the opp table vote in dp_ctrl_off_link(). > > Fixes: 375a126090b9 ("drm/msm/dp: tear down main link at unplug handle immediately") > Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > --- > drivers/gpu/drm/msm/dp/dp_ctrl.c | 1 + > 1 file changed, 1 insertion(+) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index a8069f7c4773f087229727dc38c9af0d6d84f863..9c463ae2f8fae916661fef1c7e225f55c1026478 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -2070,6 +2070,7 @@ void msm_dp_ctrl_off_link(struct msm_dp_ctrl *msm_dp_ctrl) msm_dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); + dev_pm_opp_set_rate(ctrl->dev, 0); msm_dp_ctrl_link_clk_disable(&ctrl->msm_dp_ctrl); DRM_DEBUG_DP("Before, phy=%p init_count=%d power_on=%d\n",
dp_ctrl_off_link() was created to handle a case where we received a cable connect and then get a cable disconnect without the corresponding dp_display_enable(). For such cases the pixel clock will be off but the link clock will still be on. dp_ctrl_off_link() handles this case by turning off the link clock only. However, the vote removal to the opp table for this case was missed. Remove the opp table vote in dp_ctrl_off_link(). Fixes: 375a126090b9 ("drm/msm/dp: tear down main link at unplug handle immediately") Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> --- drivers/gpu/drm/msm/dp/dp_ctrl.c | 1 + 1 file changed, 1 insertion(+)