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Wed, 18 Dec 2024 23:50:04 -0800 (PST) Received: from [127.0.1.1] ([112.65.12.217]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-219dc97432dsm6784445ad.110.2024.12.18.23.49.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 23:50:04 -0800 (PST) From: Jun Nie Date: Thu, 19 Dec 2024 15:49:23 +0800 Subject: [PATCH v3 05/15] drm/msm/dpu: fix mixer number counter on allocation MIME-Version: 1.0 Message-Id: <20241219-sm8650-v6-13-hmd-deckard-mdss-quad-upstream-32-v3-5-92c7c0a228e3@linaro.org> References: <20241219-sm8650-v6-13-hmd-deckard-mdss-quad-upstream-32-v3-0-92c7c0a228e3@linaro.org> In-Reply-To: <20241219-sm8650-v6-13-hmd-deckard-mdss-quad-upstream-32-v3-0-92c7c0a228e3@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Jun Nie X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1734594568; l=1237; i=jun.nie@linaro.org; s=20240403; h=from:subject:message-id; bh=sXtw14ojL1neJpubSJ95lKQnBR+uGpxyPZIo6yVfEbw=; b=uhe3cG7vSVDd8zvBrsHOn6GmlwDxsTZ7AbcwvCWm81qkXmw0KR5vmjtRn9kraYnZCrlQphv3n ChKiSca7AswCjd1Ey96jMu8FwF/yTtLPcD9AvGOGL+kQiFHvYF5kx9a X-Developer-Key: i=jun.nie@linaro.org; a=ed25519; pk=MNiBt/faLPvo+iJoP1hodyY2x6ozVXL8QMptmsKg3cc= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add the case to reserve multiple pairs mixers for high resolution. Current code only supports one pair of mixer usage case. To support quad-pipe usage case, two pairs of mixers are needed. Current code resets number of mixer on failure of pair's peer test and retry on another pair. If two pairs are needed, the failure on the test of 2nd pair results clearing to the 1st pair. This patch only clear the bit for the 2nd pair allocation before retry on another pair. Signed-off-by: Jun Nie --- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index cde3c5616f9bc..a8b01b78c02c7 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -316,7 +316,11 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm, if (!rm->mixer_blks[i]) continue; - lm_count = 0; + /* + * Clear the last bit to drop the previous primary mixer if + * fail to find its peer. + */ + lm_count &= 0xfe; lm_idx[lm_count] = i; if (!_dpu_rm_check_lm_and_get_connected_blks(rm, global_state,