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Sun, 05 Jan 2025 19:07:42 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-542238301efsm4869016e87.247.2025.01.05.19.07.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jan 2025 19:07:41 -0800 (PST) From: Dmitry Baryshkov Date: Mon, 06 Jan 2025 05:07:35 +0200 Subject: [PATCH v4 1/9] drm/msm/dpu: extract bandwidth aggregation function MIME-Version: 1.0 Message-Id: <20250106-dpu-perf-rework-v4-1-00b248349476@linaro.org> References: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> In-Reply-To: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Stephen Boyd , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2664; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=Ranvcf9s/bstJI3Eo8F/WLE+D4NDgHgD/Z08d8sAtcc=; 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Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 45 +++++++++++++++------------ 1 file changed, 25 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 6f0a37f954fe8797a4e3a34e7876a93d5e477642..c7ac1140e79dbf48566a89fa4d70f6bec69d1d81 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -210,36 +210,41 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc, return 0; } -static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, - struct drm_crtc *crtc) +static void dpu_core_perf_aggregate(struct drm_device *ddev, + enum dpu_crtc_client_type curr_client_type, + struct dpu_core_perf_params *perf) { - struct dpu_core_perf_params perf = { 0 }; - enum dpu_crtc_client_type curr_client_type - = dpu_crtc_get_client_type(crtc); - struct drm_crtc *tmp_crtc; struct dpu_crtc_state *dpu_cstate; - int i, ret = 0; - u64 avg_bw; - - if (!kms->num_paths) - return 0; + struct drm_crtc *tmp_crtc; - drm_for_each_crtc(tmp_crtc, crtc->dev) { + drm_for_each_crtc(tmp_crtc, ddev) { if (tmp_crtc->enabled && - curr_client_type == - dpu_crtc_get_client_type(tmp_crtc)) { + curr_client_type == dpu_crtc_get_client_type(tmp_crtc)) { dpu_cstate = to_dpu_crtc_state(tmp_crtc->state); - perf.max_per_pipe_ib = max(perf.max_per_pipe_ib, - dpu_cstate->new_perf.max_per_pipe_ib); + perf->max_per_pipe_ib = max(perf->max_per_pipe_ib, + dpu_cstate->new_perf.max_per_pipe_ib); - perf.bw_ctl += dpu_cstate->new_perf.bw_ctl; + perf->bw_ctl += dpu_cstate->new_perf.bw_ctl; - DRM_DEBUG_ATOMIC("crtc=%d bw=%llu paths:%d\n", - tmp_crtc->base.id, - dpu_cstate->new_perf.bw_ctl, kms->num_paths); + DRM_DEBUG_ATOMIC("crtc=%d bw=%llu\n", + tmp_crtc->base.id, + dpu_cstate->new_perf.bw_ctl); } } +} + +static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, + struct drm_crtc *crtc) +{ + struct dpu_core_perf_params perf = { 0 }; + int i, ret = 0; + u64 avg_bw; + + if (!kms->num_paths) + return 0; + + dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), &perf); avg_bw = perf.bw_ctl; do_div(avg_bw, (kms->num_paths * 1000)); /*Bps_to_icc*/