Message ID | 20250114055626.18816-6-aradhya.bhatia@linux.dev (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | drm/bridge: cdns-dsi: Fix the color-shift issue | expand |
On Tue, Jan 14, 2025 at 11:26:19AM +0530, Aradhya Bhatia wrote: > From: Aradhya Bhatia <a-bhatia1@ti.com> > > The crtc_* mode parameters do not get generated (duplicated in this > case) from the regular parameters before the mode validation phase > begins. > > The rest of the code conditionally uses the crtc_* parameters only > during the bridge enable phase, but sticks to the regular parameters > for mode validation. In this singular instance, however, the driver > tries to use the crtc_clock parameter even during the mode validation, > causing the validation to fail. > > Allow the D-Phy config checks to use mode->clock instead of > mode->crtc_clock during mode_valid checks, like everywhere else in the > driver. > > Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") > Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> > Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> > Signed-off-by: Aradhya Bhatia <aradhya.bhatia@linux.dev> > --- > drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c index 89e8d6f1c4dd..ccd964ba8c23 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c @@ -568,13 +568,14 @@ static int cdns_dsi_check_conf(struct cdns_dsi *dsi, struct phy_configure_opts_mipi_dphy *phy_cfg = &output->phy_opts.mipi_dphy; unsigned long dsi_hss_hsa_hse_hbp; unsigned int nlanes = output->dev->lanes; + int mode_clock = (mode_valid_check ? mode->clock : mode->crtc_clock); int ret; ret = cdns_dsi_mode2cfg(dsi, mode, dsi_cfg, mode_valid_check); if (ret) return ret; - phy_mipi_dphy_get_default_config(mode->crtc_clock * 1000, + phy_mipi_dphy_get_default_config(mode_clock * 1000, mipi_dsi_pixel_format_to_bpp(output->dev->format), nlanes, phy_cfg);