From patchwork Thu Jan 16 13:06:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Langyan Ye X-Patchwork-Id: 13941662 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2BB36C02180 for ; Thu, 16 Jan 2025 13:07:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9934710E954; Thu, 16 Jan 2025 13:07:17 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=huaqin-corp-partner-google-com.20230601.gappssmtp.com header.i=@huaqin-corp-partner-google-com.20230601.gappssmtp.com header.b="MkRSTcXk"; dkim-atps=neutral Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5886510E958 for ; Thu, 16 Jan 2025 13:07:16 +0000 (UTC) Received: by mail-pl1-f175.google.com with SMTP id d9443c01a7336-2164b1f05caso15461105ad.3 for ; Thu, 16 Jan 2025 05:07:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=huaqin-corp-partner-google-com.20230601.gappssmtp.com; s=20230601; t=1737032776; x=1737637576; darn=lists.freedesktop.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=1Sf/doY8bC48FwKJYlisYvOWvCn0u3xeZy9vgidWn9o=; b=MkRSTcXkqb86u7gK2ouyJTjRsbLG/OrS0gQ0ceae2Q1gqnJ9xOsx6Z693aszemQMg5 52VjmUwWMbpkz1bRKA3P4EJuFiSQpzirAcrs8KifLkVKHjZfTuiVBNaSJwXpNab6KlK/ Q00qFlJUbCL46ZHtIOuw5cDgvxoOG82rZMSWcCCrWUSdcd5TAwyfJg/9UajjygHALr4x ldlwUYXthsWdcChHtAgnG2guLrNnDUGtVIkL3lvr02KxCGYaD1wmOEWGmcW2TlMcB+sJ fl9t+oNntRDueVkqPpwWyaK9c36+Ad95GuOGvo1nzQ6kFXNAV1Ex4X8j/i4df2wN697E lQtw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1737032776; x=1737637576; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=1Sf/doY8bC48FwKJYlisYvOWvCn0u3xeZy9vgidWn9o=; b=TWO43jk7ahh5ogNpyYSReawEOuROHCCaFvpmDAERtTFE5wm1YpzQ14ayBk/vTSEfmO mzS8eL+iKgV/j03HzRq3aRxgszR5WB7jH4CIiqnWelqwpE9dXSK0c9lG28mly6PGcN3+ C1Z+ElGpPmxEYoRprEO7XSEqXRkdhWd6heztJSLIy5NwcYKSiLneAFROkN/SEYO4HDlk +LwrrmKRadV8py+vz3iVHTSL+6W4Y388fTSdFSnXZ+3I69NG0LR9VG4XguAzF2rkjauo j+ghOR9uCANCpBFVLyuygG4OeXKm0R7Ujnmguax0X3itlDzZ9t0zYET70Cku0LbfJ0xe 39aA== X-Forwarded-Encrypted: i=1; AJvYcCVzI5EXI/7LBmoB6SBwCopg0cZAA1AW1iCZNfCRaTtNsZUiRgLo8r/YzmgvEIcBFHhC/KDqHPD6Ko4=@lists.freedesktop.org X-Gm-Message-State: AOJu0YyTdcfMsgTgz97Zy6CxIvRjTAOtSMw6jh1Ma21Es4SfmX0c2IfJ hZtR1FsN0tUgNr8BEYTi25gCl3ctPvX4wlsBKqr63DqrD6eT9QJ7Gx5ExjHTLA8= X-Gm-Gg: ASbGncs+20aExfJyX2MfoAdnCuL66Qmv9LlU3FUrRUA6GjMbevqVfI7CApDMkYh8B3x WeVptXkv5E6Yel0U9sg1YAsirQmqxusQO1+mFSB2AXv/IKFtPZTDvjQdHaALMI6wIcE8eSg2Cwf 32yLIp55gcJ9orhlMvfzqLagg303kUvDz0IhkmLMe6wLg6aMkllyn5g+thKDBqkfyNynPMsMo5A pQ0l5qm+yTnnfajiLimEM/OVJm5/Y2Sfj+RfRruyG0qUBIFY1RuoJwSomVxs09DjJ3YB76Uw3jM /TqSocBXuyKVv43r16SW3beqbgTn X-Google-Smtp-Source: AGHT+IGSARq1Yg7USVTsxwXSRPzYakSgxsbzNFcSVim/7SIuL2W3fD6Y1HdXJ37j+CL6ENHyfd0bWg== X-Received: by 2002:a05:6a00:35c3:b0:728:e52b:1cc9 with SMTP id d2e1a72fcca58-72d2204914amr49838027b3a.18.1737032775986; Thu, 16 Jan 2025 05:06:15 -0800 (PST) Received: from dgp100339560-01.huaqin.com ([116.66.212.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72d405484bbsm10921342b3a.31.2025.01.16.05.06.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jan 2025 05:06:15 -0800 (PST) From: Langyan Ye To: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: Langyan Ye Subject: [PATCH v1 1/2] drm/panel: boe-tv101wum-nl6: support for kingdisplay-kd110n11-51ie MIPI-DSI panel Date: Thu, 16 Jan 2025 21:06:09 +0800 Message-Id: <20250116130609.3011530-1-yelangyan@huaqin.corp-partner.google.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The kingdisplay-kd110n11-51ie is a 10.95" TFT panel. which fits in nicely with the existing panel-boe-tv101wum-nl6 driver. From the datasheet, MIPI needs to keep the LP11 state before the lcm_reset pin is pulled high, so increase lp11_before_reset flag. Signed-off-by: Langyan Ye Reviewed-by: Neil Armstrong --- .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 122 ++++++++++++++++++ 1 file changed, 122 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c index 3e5b0d8636d0..72fa0f6a5cb6 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -1309,6 +1309,97 @@ static int starry_qfh032011_53g_init(struct boe_panel *boe) return 0; }; +static int kingdisplay_kd110n11_51ie_init(struct boe_panel *boe) +{ + struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi }; + + msleep(50); + + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB9, 0x83, 0x10, 0x21, 0x55, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xC4); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD9, 0xD1); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB1, 0x2C, 0xB3, 0xB3, 0x31, 0xF1, 0x33, 0xE0, 0x54, + 0x36, 0x36, 0x3A, 0x3A, 0x32, 0x8B, 0x11, 0xE5, 0x98); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xD9); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB1, 0x8B, 0x33); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x2C, 0x80, 0x3C, + 0x9F, 0x22, 0x20, 0x00, 0x00, 0x98, 0x51); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB4, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x40, 0x84, + 0x64, 0x84, 0x01, 0x9D, 0x01, 0x02, 0x01, 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBC, 0x1B, 0x04); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBE, 0x20); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBF, 0xFC, 0xC4, 0x80, 0x9C, 0x36, 0x00, 0x0D, 0x04); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xC0, 0x32, 0x32, 0x22, 0x11, 0x22, 0xA0, 0x31, 0x08, + 0xF5, 0x03); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xCC); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xC7, 0x80); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xC6); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xC8, 0x97); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x36); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xCC, 0x02, 0x03, 0x44); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD1, 0x07, 0x06, 0x00, 0x02, 0x04, 0x2C, 0xFF); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD3, 0x06, 0x00, 0x00, 0x00, 0x40, 0x04, 0x08, 0x04, + 0x08, 0x37, 0x07, 0x44, 0x37, 0x2B, 0x2B, 0x03, 0x03, 0x32, + 0x10, 0x22, 0x00, 0x25, 0x32, 0x10, 0x29, 0x00, 0x29, 0x32, + 0x10, 0x08, 0x00, 0x08, 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x07, 0x06, 0x07, 0x06, 0x05, 0x04, 0x05, 0x04, + 0x03, 0x02, 0x03, 0x02, 0x01, 0x00, 0x01, 0x00, 0x18, 0x18, + 0x25, 0x24, 0x25, 0x24, 0x1F, 0x1F, 0x1F, 0x1F, 0x1E, 0x1E, + 0x1E, 0x1E, 0x20, 0x20, 0x20, 0x20); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD8, 0x0A, 0x2A, 0xAA, 0x8A, 0xAA, 0xA0, 0x0A, 0x2A, + 0xAA, 0x8A, 0xAA, 0xA0); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE7, 0xE0, 0x10, 0x10, 0x0D, 0x1E, 0x9D, 0x02, 0x52, + 0x9D, 0x14, 0x14); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBD, 0x01); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB1, 0x01, 0x7F, 0x11, 0xFD); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xC5); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBA, 0x4F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xCB, 0x86); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD2, 0x64); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xC5); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD3, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD8, 0x0A, 0x2A, 0xAA, 0x8A, 0xAA, 0xA0, 0x0A, 0x2A, + 0xAA, 0x8A, 0xAA, 0xA0, 0x05, 0x15, 0x55, 0x45, 0x55, 0x50, + 0x05, 0x15, 0x55, 0x45, 0x55, 0x50); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE7, 0x02, 0x00, 0x24, 0x01, 0x7E, 0x0F, 0x7C, 0x10, + 0xA0, 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBD, 0x02); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xCB, 0x03, 0x07, 0x00, 0x10, 0x7B); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD8, 0x0F, 0x3F, 0xFF, 0xCF, 0xFF, 0xF0, 0x0F, 0x3F, + 0xFF, 0xCF, 0xFF, 0xF0); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE7, 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01, 0x00, 0x00, + 0x00, 0x23, 0x00, 0x23, 0x81, 0x02, 0x40, 0x00, 0x20, 0x9D, + 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBD, 0x03); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB2, 0x66, 0x81); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xC6); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB4, 0x03, 0xFF, 0xF8); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD8, 0x0A, 0x2A, 0xAA, 0x8A, 0xAA, 0xA0, 0x0A, 0x2A, + 0xAA, 0x8A, 0xAA, 0xA0, 0x0F, 0x2A, 0xAA, 0x8A, 0xAA, 0xF0, + 0x0F, 0x2A, 0xAA, 0x8A, 0xAA, 0xF0, 0x0A, 0x2A, 0xAA, 0x8A, + 0xAA, 0xA0, 0x0A, 0x2A, 0xAA, 0x8A, 0xAA, 0xA0); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBD, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB9, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0x11); + + mipi_dsi_msleep(&ctx, 120); + + mipi_dsi_dcs_write_seq_multi(&ctx, 0x29); + + mipi_dsi_msleep(&ctx, 20); + + return 0; +} + static inline struct boe_panel *to_boe_panel(struct drm_panel *panel) { return container_of(panel, struct boe_panel, base); @@ -1642,6 +1733,34 @@ static const struct panel_desc starry_qfh032011_53g_desc = { .lp11_before_reset = true, }; +static const struct drm_display_mode kingdisplay_kd110n11_51ie_default_mode = { + .clock = (1200 + 124 + 80 + 80) * (1920 + 88 + 8 + 38) * 60 / 1000, + .hdisplay = 1200, + .hsync_start = 1200 + 124, + .hsync_end = 1200 + 124 + 80, + .htotal = 1200 + 124 + 80 + 80, + .vdisplay = 1920, + .vsync_start = 1920 + 88, + .vsync_end = 1920 + 88 + 8, + .vtotal = 1920 + 88 + 8 + 38, + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, +}; + +static const struct panel_desc kingdisplay_kd110n11_51ie_desc = { + .modes = &kingdisplay_kd110n11_51ie_default_mode, + .bpc = 8, + .size = { + .width_mm = 147, + .height_mm = 235, + }, + .lanes = 4, + .format = MIPI_DSI_FMT_RGB888, + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | + MIPI_DSI_MODE_LPM, + .init = kingdisplay_kd110n11_51ie_init, + .lp11_before_reset = true, +}; + static int boe_panel_get_modes(struct drm_panel *panel, struct drm_connector *connector) { @@ -1807,6 +1926,9 @@ static const struct of_device_id boe_of_match[] = { { .compatible = "starry,2081101qfh032011-53g", .data = &starry_qfh032011_53g_desc }, + { .compatible = "kingdisplay,kd110n11-51ie", + .data = &kingdisplay_kd110n11_51ie_desc + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, boe_of_match);