From patchwork Thu Jan 16 13:06:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Langyan Ye X-Patchwork-Id: 13941661 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A374BC02187 for ; Thu, 16 Jan 2025 13:06:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 463E910E59B; Thu, 16 Jan 2025 13:06:41 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=huaqin-corp-partner-google-com.20230601.gappssmtp.com header.i=@huaqin-corp-partner-google-com.20230601.gappssmtp.com header.b="k8EOxu/G"; dkim-atps=neutral Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9E7CD10E597 for ; Thu, 16 Jan 2025 13:06:40 +0000 (UTC) Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-2167141dfa1so15813925ad.1 for ; Thu, 16 Jan 2025 05:06:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=huaqin-corp-partner-google-com.20230601.gappssmtp.com; s=20230601; t=1737032800; x=1737637600; darn=lists.freedesktop.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=6vsu01DL5YXruSfsNC0w4FgwMrAXarB2x6Q2xxx/MZ8=; b=k8EOxu/GzROydzut0mA5mcRR+41r8rsda6ZJ2I6QXEMALkqBfcfTNQNQfwFWsFTcD1 yfnHcr6EVH9PUGfqQuaFSa5XgpoIVjo6f9bat1GqG4MHiFaB62LDnkp8Idx2pJ1fFLMA vjZSHucPrfFviHXVUWF05LYQK+AM1zIeMYdK9wOtcK68UHTqF09tHQtpph2It64mNS20 elY21JTd7HixKJRCtt8Ym7jqvM3iBfwlVDhiEGRuh0Vx4s4ztjzLZW7RskPbpKM496lh 2pkrGLurTJLye2lvaeGM7bQY+RPyKG7oSEoQ1t2B86aG/Cb+glUluYGXvkmrFF8/4DA3 xorw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1737032800; x=1737637600; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=6vsu01DL5YXruSfsNC0w4FgwMrAXarB2x6Q2xxx/MZ8=; b=bacXFQoWX4eq8zKhCEZEiU51zJqTXc8kB1Pc9KabCvNmVi/dI+g6HB4B1P/sDHTIys 1bfwDGVfPxo6oo4g7D4y1V8AS496GWSuDbaG8FOMJMlWP4SMStqdu5Vf49Ru/MBjiDBD B4+F1c1OUPR1TZ/dTQNwy6x3IXKGh+6xHAuCxMJD1xQsGHsw8HU0/FrFx61pIniAc86o EZpv81cgAAAU6IF7MJVwJjq65fBWUvgRepVbJ/XL+VBsvIGDwMbVI41ZpDwy+MWH48qF 0xxkMMTpxwP2eX3cpmLA1PRz1Li/OCaJHLcdzBE084yINdZU4BAiiZxm0Ou3hYeZRVkU Bgaw== X-Forwarded-Encrypted: i=1; AJvYcCWAMQJRSc/YUp0P8S1Tolul/JMVXhftSihX0zciw3FjuiVMdYyapRHGPak/YAXVvPTu4aREZxbzHPk=@lists.freedesktop.org X-Gm-Message-State: AOJu0YwLVLyExXBl/cRmsHo71r7N0fyxvYsQBK4rkuG21R5MH7rzPqrY zEqfrtcLKxHB8sa37sRV0HMIBm+XFSbpQR8VwUihzSJA1bpyeaOqOgMdXiBtzdE= X-Gm-Gg: ASbGncut4KJHQOzv7Emo8PQ9krYK03eTfrrpjj9jpgjix2lB1LjUyRjxMcLFfQdZLOT egJyil1RpddTaOCyJs5vAYbUgDj1LzAdRSpIVUm99mWRy8TaqazCdWwgLIGI9FCRH6qOspxZidP Aelz6BRg1Aw7iHo1lvdBhwCQTm8sPExCGYs2imx3dzKypWFSrG3g8Ty2SFB2c00hcBLjtX/79Ui XSk1bo+LRbw2jrXmTZM1L5I0YXn7Ls2XXTWwXZ/ONNGtCQP6+Qej/uPxBiWHvfwAK0Lb15o+6+y 0k3EY7p9oSmT547FDKgULxG4fRvY X-Google-Smtp-Source: AGHT+IGsW6PJR5j9gbErZG7gnmuGoFL5DYwHSF0N2YANSYXssMyRrcE2VB6uPHafZX0gIKNWXPopaA== X-Received: by 2002:a17:902:ecce:b0:215:a303:24e9 with SMTP id d9443c01a7336-21bf0b7698emr102585775ad.3.1737032800062; Thu, 16 Jan 2025 05:06:40 -0800 (PST) Received: from dgp100339560-01.huaqin.com ([116.66.212.162]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-21a9f25a583sm99153525ad.244.2025.01.16.05.06.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jan 2025 05:06:39 -0800 (PST) From: Langyan Ye To: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: Langyan Ye Subject: [PATCH v1 2/2] drm/panel: boe-tv101wum-nl6: support for starry-2082109qfh040022-50e MIPI-DSI panel Date: Thu, 16 Jan 2025 21:06:33 +0800 Message-Id: <20250116130633.3012433-1-yelangyan@huaqin.corp-partner.google.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The starry-2082109qfh040022-50e is a 10.95" TFT panel. which fits in nicely with the existing panel-boe-tv101wum-nl6 driver. From the datasheet, MIPI needs to keep the LP11 state before the lcm_reset pin is pulled high, so increase lp11_before_reset flag. Signed-off-by: Langyan Ye Reviewed-by: Neil Armstrong --- .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 148 ++++++++++++++++++ 1 file changed, 148 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c index 72fa0f6a5cb6..d45321cece55 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -1400,6 +1400,123 @@ static int kingdisplay_kd110n11_51ie_init(struct boe_panel *boe) return 0; } +static int starry_2082109qfh040022_50e_init(struct boe_panel *boe) +{ + struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi }; + + msleep(50); + + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB9, 0x83, 0x10, 0x21, 0x55, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xC4); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD9, 0xD1); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB1, 0x2C, 0xB5, 0xB5, 0x31, 0xF1, 0x33, 0xC3, 0x57, + 0x36, 0x36, 0x36, 0x36, 0x1A, 0x8B, 0x11, 0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, + 0x8F, 0xFF, 0x08, 0x3C, 0x33); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x22, 0x70, 0x3C, + 0xA1, 0x22, 0x00, 0x00, 0x00, 0x88, 0xF4); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB4, 0x14, 0x16, 0x14, 0x50, 0x14, 0x50, 0x0D, 0x6A, + 0x0D, 0x6A, 0x01, 0x9E); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB6, 0x34, 0x34, 0x03); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB8, 0x40); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xCD); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBA, 0x84); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBC, 0x1B, 0x04); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBE, 0x20); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBF, 0xFC, 0xC4); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xC0, 0x38, 0x38, 0x22, 0x11, 0x33, 0xA0, 0x61, 0x08, + 0xF5, 0x03); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xCC); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xC7, 0x80); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xC6); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xC8, 0x97); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xC9, 0x00, 0x1E, 0x30, 0xD4, 0x01); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x16); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xCC, 0x02, 0x03, 0x44); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xC4); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD0, 0x03); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x2C, 0xFF); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x3B, 0x03, 0x73, 0x3B, 0x21, 0x21, 0x03, 0x03, 0x98, 0x10, 0x1D, 0x00, + 0x1D, 0x32, 0x17, 0xA1, 0x07, 0xA1, 0x43, 0x17, 0xA6, 0x07, 0xA6, 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x40, 0x40, + 0x18, 0x18, 0x18, 0x18, 0x2A, 0x2B, 0x1F, 0x1F, 0x1E, 0x1E, 0x24, 0x25, 0x26, + 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0A, 0x0B, 0x20, 0x21, 0x18, 0x18, 0x18, 0x18); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD8, 0x02, 0xAA, 0xEA, 0xAA, 0xAA, 0x00, 0x02, 0xAA, + 0xEA, 0xAA, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE7, 0x07, 0x10, 0x10, 0x2A, 0x32, 0x9F, 0x01, 0x5A, + 0x91, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x05, 0x02, 0x02, 0x10, 0x33, + 0x02, 0x04, 0x18, 0x01); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBD, 0x01); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB1, 0x01, 0x7F, 0x11, 0xFD); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xCB, 0x86); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD2, 0x3D); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xC5); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD3, 0x00, 0x00, 0x00, 0x80, 0x80, 0x0C, 0xA1); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD8, 0x03, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x03, 0xFF, + 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE7, 0x02, 0x00, 0x2D, 0x01, 0x7F, 0x0F, 0x7C, 0x10, + 0xA0, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBD, 0x02); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBF, 0xF2); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xCB, 0x02, 0x00, 0x00, 0x10, 0x58); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD2, 0x0A, 0x0A, 0x05, 0x03, 0x0A, 0x0A, 0x01, 0x03, + 0x01, 0x01, 0x05, 0x0E); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xCC); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD3, 0x03, 0x1F, 0xE0, 0x11, 0x70); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD8, 0xAB, 0xFF, 0xFF, 0xFF, 0xFF, 0xA0, 0xAB, 0xFF, + 0xFF, 0xFF, 0xFF, 0xA0); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE7, 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01, 0x00, 0x00, + 0x00, 0x03, 0x00, 0x03, 0x81, 0x02, 0x40, 0x00, 0x20, 0x9E, 0x02, 0x01, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBD, 0x03); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xC6); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB4, 0x03, 0xFF, 0xF8); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xD8, 0xAA, 0xAB, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xAB, + 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBF, 0xFF, 0xFF, 0xFE, 0xA0, 0xAA, 0xBF, 0xFF, + 0xFF, 0xFE, 0xA0, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xA0, 0xAA, 0xAA, 0xAA, 0xAA, + 0xAA, 0xA0); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE1, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBD, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xC4); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBA, 0x96); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBD, 0x01); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xC5); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBA, 0x4F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBD, 0x02); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0xCC); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBA, 0x84); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xE9, 0x3F); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xBD, 0x00); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xB9, 0x00, 0x00, 0x00, 0x00); + + msleep(110); + + mipi_dsi_dcs_write_seq_multi(&ctx, 0x11); + + mipi_dsi_msleep(&ctx, 120); + + mipi_dsi_dcs_write_seq_multi(&ctx, 0x29); + + mipi_dsi_msleep(&ctx, 20); + + return 0; +} + static inline struct boe_panel *to_boe_panel(struct drm_panel *panel) { return container_of(panel, struct boe_panel, base); @@ -1761,6 +1878,34 @@ static const struct panel_desc kingdisplay_kd110n11_51ie_desc = { .lp11_before_reset = true, }; +static const struct drm_display_mode starry_2082109qfh040022_50e_default_mode = { + .clock = (1200 + 160 + 66 + 120) * (1920 + 115 + 8 + 28) * 60 / 1000, + .hdisplay = 1200, + .hsync_start = 1200 + 160, + .hsync_end = 1200 + 160 + 66, + .htotal = 1200 + 160 + 66 + 120, + .vdisplay = 1920, + .vsync_start = 1920 + 115, + .vsync_end = 1920 + 115 + 8, + .vtotal = 1920 + 115 + 8 + 28, + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, +}; + +static const struct panel_desc starry_2082109qfh040022_50e_desc = { + .modes = &starry_2082109qfh040022_50e_default_mode, + .bpc = 8, + .size = { + .width_mm = 147, + .height_mm = 235, + }, + .lanes = 4, + .format = MIPI_DSI_FMT_RGB888, + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | + MIPI_DSI_MODE_LPM, + .init = starry_2082109qfh040022_50e_init, + .lp11_before_reset = true, +}; + static int boe_panel_get_modes(struct drm_panel *panel, struct drm_connector *connector) { @@ -1929,6 +2074,9 @@ static const struct of_device_id boe_of_match[] = { { .compatible = "kingdisplay,kd110n11-51ie", .data = &kingdisplay_kd110n11_51ie_desc }, + { .compatible = "starry,2082109qfh040022-50e", + .data = &starry_2082109qfh040022_50e_desc + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, boe_of_match);