From patchwork Wed Jan 29 19:52:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Matthew Brost X-Patchwork-Id: 13954080 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 49EDCC02194 for ; Wed, 29 Jan 2025 19:51:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B9C1A10E8CB; Wed, 29 Jan 2025 19:51:38 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="jQNpSC/o"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id AF46F10E8A0; Wed, 29 Jan 2025 19:51:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738180286; x=1769716286; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NB0QBl4lfCKwpc8KoAi0ERhA6dJJ/tUKXU3WjHTQIDY=; b=jQNpSC/ods/iRbwkuceRrVWO6BH/rfVkY+X+qg0urnwmzUzIoO4mqgvI LayZcc1V34aBi33vDgdxJjcncJAcjRUqxCMmhgopYwEGul8KeA4awy/IC SBLBXP0PYqJfXFDcNdbeeKV7JfCVyC/9zkTGzG4auecn7v71DoZ27QZ2c yFL2Cr3V3xR4FX3mIjpjXPDqGSXGrFSlVQJdw+UNUfUCcLD3k/xxc8oir z/O09o0BMND4QYMQFc8Z/Yrvgpszm9223b1RGK7bxTqFRqTbPDpnCXvGy /wDtIHgzA9kN7yHgZlKQEuz6cz1hmo0pLp0h59ldlUEFT+Tk/pM48Bv5G A==; X-CSE-ConnectionGUID: UEBi/tPTS027tpa2Y1zO0Q== X-CSE-MsgGUID: 2TBL9W8CRoaF0ltM0S3Z8g== X-IronPort-AV: E=McAfee;i="6700,10204,11314"; a="50132859" X-IronPort-AV: E=Sophos;i="6.12,310,1728975600"; d="scan'208";a="50132859" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2025 11:51:25 -0800 X-CSE-ConnectionGUID: zKi4TZGBRyCEBFy3Y37iyw== X-CSE-MsgGUID: EHzCRLeJQmux80W2VxrSLw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="132392185" Received: from lstrano-desk.jf.intel.com ([10.54.39.91]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2025 11:51:25 -0800 From: Matthew Brost To: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: himal.prasad.ghimiray@intel.com, apopple@nvidia.com, airlied@gmail.com, thomas.hellstrom@linux.intel.com, simona.vetter@ffwll.ch, felix.kuehling@amd.com, dakr@kernel.org Subject: [PATCH v4 25/33] drm/xe: Add Xe SVM populate_devmem_pfn GPU SVM vfunc Date: Wed, 29 Jan 2025 11:52:04 -0800 Message-Id: <20250129195212.745731-26-matthew.brost@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250129195212.745731-1-matthew.brost@intel.com> References: <20250129195212.745731-1-matthew.brost@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Get device pfns from BO's buddy blocks. Used in migrate_* core MM functions called in GPU SVM to migrate between device and system memory. v2: - Use new drm_gpusvm_devmem_ops v3: - Better commit message (Thomas) Signed-off-by: Niranjana Vishwanathapura Signed-off-by: Oak Zeng Signed-off-by: Matthew Brost Reviewed-by: Thomas Hellström --- drivers/gpu/drm/xe/xe_svm.c | 40 +++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c index 222d252521f8..1fbb9777ee0c 100644 --- a/drivers/gpu/drm/xe/xe_svm.c +++ b/drivers/gpu/drm/xe/xe_svm.c @@ -7,6 +7,7 @@ #include "xe_migrate.h" #include "xe_pt.h" #include "xe_svm.h" +#include "xe_ttm_vram_mgr.h" #include "xe_vm.h" #include "xe_vm_types.h" @@ -455,8 +456,47 @@ static int xe_svm_copy_to_ram(struct page **pages, dma_addr_t *dma_addr, return xe_svm_copy(pages, dma_addr, npages, XE_SVM_COPY_TO_SRAM); } +static struct xe_bo *to_xe_bo(struct drm_gpusvm_devmem *devmem_allocation) +{ + return container_of(devmem_allocation, struct xe_bo, devmem_allocation); +} + +static u64 block_offset_to_pfn(struct xe_mem_region *mr, u64 offset) +{ + return PHYS_PFN(offset + mr->hpa_base); +} + +static struct drm_buddy *tile_to_buddy(struct xe_tile *tile) +{ + return &tile->mem.vram_mgr->mm; +} + +static int xe_svm_populate_devmem_pfn(struct drm_gpusvm_devmem *devmem_allocation, + unsigned long npages, unsigned long *pfn) +{ + struct xe_bo *bo = to_xe_bo(devmem_allocation); + struct ttm_resource *res = bo->ttm.resource; + struct list_head *blocks = &to_xe_ttm_vram_mgr_resource(res)->blocks; + struct drm_buddy_block *block; + int j = 0; + + list_for_each_entry(block, blocks, link) { + struct xe_mem_region *mr = block->private; + struct xe_tile *tile = mr_to_tile(mr); + struct drm_buddy *buddy = tile_to_buddy(tile); + u64 block_pfn = block_offset_to_pfn(mr, drm_buddy_block_offset(block)); + int i; + + for (i = 0; i < drm_buddy_block_size(buddy, block) >> PAGE_SHIFT; ++i) + pfn[j++] = block_pfn + i; + } + + return 0; +} + __maybe_unused static const struct drm_gpusvm_devmem_ops gpusvm_devmem_ops = { + .populate_devmem_pfn = xe_svm_populate_devmem_pfn, .copy_to_devmem = xe_svm_copy_to_devmem, .copy_to_ram = xe_svm_copy_to_ram, };