diff mbox series

[v6,40/42] drm/mediatek: mtk_hdmi_common: Add var to enable interlaced modes

Message ID 20250211113409.1517534-41-angelogioacchino.delregno@collabora.com (mailing list archive)
State New, archived
Headers show
Series Add support for MT8195/88 DPI, HDMIv2 and DDCv2 | expand

Commit Message

AngeloGioacchino Del Regno Feb. 11, 2025, 11:34 a.m. UTC
Add an interlace_allowed bool member to struct mtk_hdmi_ver_conf
which will be used to signal whether interlaced modes are supported
by the bridge (in our case, the HDMI IP), and enable it for HDMIv2.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/gpu/drm/mediatek/mtk_hdmi_common.c | 1 +
 drivers/gpu/drm/mediatek/mtk_hdmi_common.h | 1 +
 drivers/gpu/drm/mediatek/mtk_hdmi_v2.c     | 1 +
 3 files changed, 3 insertions(+)

Comments

CK Hu (胡俊光) Feb. 14, 2025, 5:16 a.m. UTC | #1
On Tue, 2025-02-11 at 12:34 +0100, AngeloGioacchino Del Regno wrote:
> External email : Please do not click links or open attachments until you have verified the sender or the content.
> 
> 
> Add an interlace_allowed bool member to struct mtk_hdmi_ver_conf
> which will be used to signal whether interlaced modes are supported
> by the bridge (in our case, the HDMI IP), and enable it for HDMIv2.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_hdmi_common.c | 1 +
>  drivers/gpu/drm/mediatek/mtk_hdmi_common.h | 1 +
>  drivers/gpu/drm/mediatek/mtk_hdmi_v2.c     | 1 +
>  3 files changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c b/drivers/gpu/drm/mediatek/mtk_hdmi_common.c
> index 2f2e77b664a2..750bcb45c33d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c
> +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_common.c
> @@ -429,6 +429,7 @@ struct mtk_hdmi *mtk_hdmi_common_probe(struct platform_device *pdev)
>         hdmi->bridge.ddc = hdmi->ddc_adpt;
>         hdmi->bridge.vendor = "MediaTek";
>         hdmi->bridge.product = "On-Chip HDMI";
> +       hdmi->bridge.interlace_allowed = ver_conf->interlace_allowed;
> 
>         ret = devm_drm_bridge_add(dev, &hdmi->bridge);
>         if (ret)
> diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.h b/drivers/gpu/drm/mediatek/mtk_hdmi_common.h
> index e74fe1371324..de5e064585f8 100644
> --- a/drivers/gpu/drm/mediatek/mtk_hdmi_common.h
> +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_common.h
> @@ -137,6 +137,7 @@ struct mtk_hdmi_ver_conf {
>         const struct hdmi_codec_ops *codec_ops;
>         const char * const *mtk_hdmi_clock_names;
>         int num_clocks;
> +       bool interlace_allowed;
>  };
> 
>  struct mtk_hdmi_conf {
> diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c b/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
> index 338a6dda2fd2..36b7f8d8d218 100644
> --- a/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
> +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
> @@ -1292,6 +1292,7 @@ static const struct mtk_hdmi_ver_conf mtk_hdmi_conf_v2 = {
>         .codec_ops = &mtk_hdmi_v2_audio_codec_ops,
>         .mtk_hdmi_clock_names = mtk_hdmi_v2_clk_names,
>         .num_clocks = MTK_HDMI_V2_CLK_COUNT,
> +       .interlace_allowed = true,

Move this patch before HDMI v2 patch.
And let this line to be in HDMI v2 patch.
After this,

Reviewed-by: CK Hu <ck.hu@mediatek.com>

>  };
> 
>  static const struct mtk_hdmi_conf mtk_hdmi_conf_mt8188 = {
> --
> 2.48.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c b/drivers/gpu/drm/mediatek/mtk_hdmi_common.c
index 2f2e77b664a2..750bcb45c33d 100644
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_common.c
@@ -429,6 +429,7 @@  struct mtk_hdmi *mtk_hdmi_common_probe(struct platform_device *pdev)
 	hdmi->bridge.ddc = hdmi->ddc_adpt;
 	hdmi->bridge.vendor = "MediaTek";
 	hdmi->bridge.product = "On-Chip HDMI";
+	hdmi->bridge.interlace_allowed = ver_conf->interlace_allowed;
 
 	ret = devm_drm_bridge_add(dev, &hdmi->bridge);
 	if (ret)
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.h b/drivers/gpu/drm/mediatek/mtk_hdmi_common.h
index e74fe1371324..de5e064585f8 100644
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_common.h
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_common.h
@@ -137,6 +137,7 @@  struct mtk_hdmi_ver_conf {
 	const struct hdmi_codec_ops *codec_ops;
 	const char * const *mtk_hdmi_clock_names;
 	int num_clocks;
+	bool interlace_allowed;
 };
 
 struct mtk_hdmi_conf {
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c b/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
index 338a6dda2fd2..36b7f8d8d218 100644
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
@@ -1292,6 +1292,7 @@  static const struct mtk_hdmi_ver_conf mtk_hdmi_conf_v2 = {
 	.codec_ops = &mtk_hdmi_v2_audio_codec_ops,
 	.mtk_hdmi_clock_names = mtk_hdmi_v2_clk_names,
 	.num_clocks = MTK_HDMI_V2_CLK_COUNT,
+	.interlace_allowed = true,
 };
 
 static const struct mtk_hdmi_conf mtk_hdmi_conf_mt8188 = {