| Message ID | 20250219140239.1378758-10-m.wilczynski@samsung.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Enable drm/imagination BXM-4-64 Support for LicheePi 4A | expand |
On Wed, Feb 19, 2025 at 03:02:27PM +0100, Michal Wilczynski wrote: > Add a mandatory reset property for the TH1520 VO clock controller that > handles the GPU clocks. This reset line controls the GPU CLKGEN reset, > which is required for proper GPU clock operation. > > The reset property is only required for the "thead,th1520-clk-vo" > compatible, as it specifically handles the GPU-related clocks. > > Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> > --- > .../bindings/clock/thead,th1520-clk-ap.yaml | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml b/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml > index 9d058c00ab3d..6ea8202718d0 100644 > --- a/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml > +++ b/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml > @@ -40,6 +40,12 @@ properties: > (integer PLL) typically running at 792 MHz (FOUTPOSTDIV), with > a maximum FOUTVCO of 2376 MHz. > > + resets: > + maxItems: 1 > + description: > + Required for "thead,th1520-clk-vo". This reset line controls the You just added the compatible in other patch, so are you saying you added knowingly incomplete code? No, this must be squashed. > + GPU CLKGEN reset which is required for proper GPU clock operation. > + > "#clock-cells": > const: 1 > description: > @@ -51,6 +57,16 @@ required: > - clocks > - "#clock-cells" > > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: thead,th1520-clk-vo > + then: > + required: > + - resets else: ? What's there? Also reset or no? Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml b/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml index 9d058c00ab3d..6ea8202718d0 100644 --- a/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml +++ b/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml @@ -40,6 +40,12 @@ properties: (integer PLL) typically running at 792 MHz (FOUTPOSTDIV), with a maximum FOUTVCO of 2376 MHz. + resets: + maxItems: 1 + description: + Required for "thead,th1520-clk-vo". This reset line controls the + GPU CLKGEN reset which is required for proper GPU clock operation. + "#clock-cells": const: 1 description: @@ -51,6 +57,16 @@ required: - clocks - "#clock-cells" +allOf: + - if: + properties: + compatible: + contains: + const: thead,th1520-clk-vo + then: + required: + - resets + additionalProperties: false examples:
Add a mandatory reset property for the TH1520 VO clock controller that handles the GPU clocks. This reset line controls the GPU CLKGEN reset, which is required for proper GPU clock operation. The reset property is only required for the "thead,th1520-clk-vo" compatible, as it specifically handles the GPU-related clocks. Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> --- .../bindings/clock/thead,th1520-clk-ap.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)