From patchwork Sun Feb 23 11:30:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Yan X-Patchwork-Id: 13986945 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B1C5DC021B2 for ; Sun, 23 Feb 2025 11:35:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 30A3D10E295; Sun, 23 Feb 2025 11:35:24 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=163.com header.i=@163.com header.b="XjfdQZnQ"; dkim-atps=neutral Received: from m16.mail.163.com (m16.mail.163.com [220.197.31.3]) by gabe.freedesktop.org (Postfix) with ESMTP id 6B48C10E034 for ; Sun, 23 Feb 2025 11:31:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-ID:MIME-Version; bh=8O6s/ Or5PgZ3nOkE6KkXcdydvMMnOex78q09+RFYlpQ=; b=XjfdQZnQ+ARx0XvTY3oli 5aGXA+hog0p6hWeG4bfsPlcyFn49VZxWe3IiW8GDDRdnloGrGkYpxFyYHIH80w/7 UEGOBNaoMiT/Wu0d0uXeaWnbvtI5LuiTmFGA6KlBctVwFotPrvIYo6Nlwq10sCDO VRuKHEdSYNHtDVECjewi48= Received: from ProDesk.. (unknown []) by gzsmtp4 (Coremail) with SMTP id PygvCgBHWqbdBrtnleHpAg--.47651S6; Sun, 23 Feb 2025 19:30:47 +0800 (CST) From: Andy Yan To: heiko@sntech.de Cc: hjc@rock-chips.com, mripard@kernel.org, cristian.ciocaltea@collabora.com, neil.armstrong@linaro.org, yubing.zhang@rock-chips.com, krzk+dt@kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, robh@kernel.org, sebastian.reichel@collabora.com, Andy Yan Subject: [PATCH 4/6] arm64: dts: rockchip: Add DP0 for rk3588 Date: Sun, 23 Feb 2025 19:30:27 +0800 Message-ID: <20250223113036.74252-5-andyshrk@163.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250223113036.74252-1-andyshrk@163.com> References: <20250223113036.74252-1-andyshrk@163.com> MIME-Version: 1.0 X-CM-TRANSID: PygvCgBHWqbdBrtnleHpAg--.47651S6 X-Coremail-Antispam: 1Uf129KBjvJXoW7Cry8Kr1kXFW8tFyUGry3urg_yoW8XFW7p3 ZrCrZ3XrW8uF42q39xKr1ktrZYy3Z5CFZYkrn7Gryjkr1Sqr9FkrySgrn3A34DXr47ZwsF vFs3try0kF4qyaUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07UXYFZUUUUU= X-Originating-IP: [58.22.7.114] X-CM-SenderInfo: 5dqg52xkunqiywtou0bp/xtbBkBD8Xme7AH88NgAFsO X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Andy Yan The DP0 is compliant with the DisplayPort Specification Version 1.4, and share the USBDP combo PHY0 with USB 3.1 HOST0 controller. Signed-off-by: Andy Yan --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi index 4989fcd5e592..0aa8026fce95 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1371,6 +1371,36 @@ i2s9_8ch: i2s@fddfc000 { status = "disabled"; }; + dp0: dp@fde50000 { + compatible = "rockchip,rk3588-dp"; + reg = <0x0 0xfde50000 0x0 0x4000>; + interrupts = ; + clocks = <&cru PCLK_DP0>, <&cru CLK_AUX16M_0>, + <&cru CLK_DP0>, <&cru MCLK_I2S4_8CH_TX>, + <&cru MCLK_SPDIF2_DP0>; + clock-names = "apb", "aux", "hdcp", "i2s", "spdif"; + assigned-clocks = <&cru CLK_AUX16M_0>; + assigned-clock-rates = <16000000>; + resets = <&cru SRST_DP0>; + phys = <&usbdp_phy0 PHY_TYPE_DP>; + power-domains = <&power RK3588_PD_VO0>; + #sound-dai-cells = <0>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + dp0_in: port@0 { + reg = <0>; + }; + + dp0_out: port@1 { + reg = <1>; + }; + }; + }; + hdmi0: hdmi@fde80000 { compatible = "rockchip,rk3588-dw-hdmi-qp"; reg = <0x0 0xfde80000 0x0 0x20000>;