Message ID | 20250321093435.94835-2-paul-pl.chen@mediatek.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | Add MediaTek SoC DRM support for MT8196 | expand |
On Fri, Mar 21, 2025 at 05:33:30PM +0800, paul-pl.chen wrote: > From: Paul-pl Chen <paul-pl.chen@mediatek.com> > > In previous SoCs, a single HW pipeline was an independent mmsys, > which included the OVL module, PQ module, and display interface > module. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index 3f4262e93c78..5f244a8f6a47 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -39,6 +39,11 @@ properties: - mediatek,mt8195-vdosys1 - mediatek,mt8195-vppsys0 - mediatek,mt8195-vppsys1 + - mediatek,mt8196-dispsys0 + - mediatek,mt8196-dispsys1 + - mediatek,mt8196-ovlsys0 + - mediatek,mt8196-ovlsys1 + - mediatek,mt8196-vdisp-ao - mediatek,mt8365-mmsys - const: syscon