From patchwork Sat Mar 22 09:23:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Mailhol X-Patchwork-Id: 14026179 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 545AFC3600A for ; Sat, 22 Mar 2025 09:24:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B8A3010E2C8; Sat, 22 Mar 2025 09:24:25 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="fpYQZWad"; dkim-atps=neutral Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5F6F210E032; Sat, 22 Mar 2025 09:24:21 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 0ADB243B3C; Sat, 22 Mar 2025 09:24:12 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 3D4F5C4CEEE; Sat, 22 Mar 2025 09:24:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742635452; bh=ec6SddMtMCNtHiu4Bo6AdH7pFl3wMO0aJ0kn6rot2jc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=fpYQZWadUVka5Yyh6oRFm6gQ/pYdYbcimUDoDo9xBhmfMZWKH+JrgDtvvHWa/3DJ+ eF/EbA9bpq5thh2Vg9WtP1o57j73599Hs2x4Lx8M6SZmv4Nj0OUNs+yXD6dBvJ0H5n cP1wuqk4ROKPx9Gvs6xqL9gsTvXEJiOYIp/t9E3p5EpA0bBLY3w3WsuTG+fW89VSzl B+1NU3Sl2YhK2VVKUX5VhFdhgj4acMHOaZKDFEGoAIrLDQFYAnyB7Ou79DHmbEafWn f54Lnm2sJlUhYB9bYmBzclqUFqxuX6B2hA0Wuuen6czCg+oTYyCUWN+rIaaywhLp1i Iw/p1skxu04jw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30515C35FFC; Sat, 22 Mar 2025 09:24:12 +0000 (UTC) Date: Sat, 22 Mar 2025 18:23:14 +0900 Subject: [PATCH v7 3/5] drm/i915: Convert REG_GENMASK*() to fixed-width GENMASK_U*() MIME-Version: 1.0 Message-Id: <20250322-fixed-type-genmasks-v7-3-da380ff1c5b9@wanadoo.fr> References: <20250322-fixed-type-genmasks-v7-0-da380ff1c5b9@wanadoo.fr> In-Reply-To: <20250322-fixed-type-genmasks-v7-0-da380ff1c5b9@wanadoo.fr> To: Yury Norov , Lucas De Marchi , Rasmus Villemoes , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Simona Vetter , Andrew Morton Cc: linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Andi Shyti , David Laight , Andy Shevchenko , Jani Nikula , Vincent Mailhol X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=5704; i=mailhol.vincent@wanadoo.fr; h=from:subject:message-id; bh=4LhKbvWSDntwuEuEy716J5O9CZKxftwhhlAtuaoqKg4=; b=owGbwMvMwCV2McXO4Xp97WbG02pJDOn3Gjff+VIwKfOQkrnO/y8fOwq0PzSr+hl+j1XtZ1qw9 M3pJvXvHaUsDGJcDLJiiizLyjm5FToKvcMO/bWEmcPKBDKEgYtTACZykpXhn8GV1Subp7ZeiuE9 J/j9j/yDTX+b/yvdFApVYNPO5zER1mD47/L/dG9mmlP8zYyq6mzmWfFzO2Xu+QtXbtb/Fcs1sfw UEwA= X-Developer-Key: i=mailhol.vincent@wanadoo.fr; a=openpgp; fpr=ED8F700574E67F20E574E8E2AB5FEB886DBB99C2 X-Endpoint-Received: by B4 Relay for mailhol.vincent@wanadoo.fr/default with auth_id=291 X-Original-From: Vincent Mailhol X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: mailhol.vincent@wanadoo.fr Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Vincent Mailhol From: Lucas De Marchi Now that include/linux/bits.h implements fixed-width GENMASK_U*(), use them to implement the i915/xe specific macros. Converting each driver to use the generic macros are left for later, when/if other driver-specific macros are also generalized. Signed-off-by: Lucas De Marchi Acked-by: Jani Nikula Signed-off-by: Vincent Mailhol --- Changelog: v6 -> v7: - Replace BIT_* and GENMASK_* by BIT_U*() and GENMASK_U*() in the description. - Add the information in the description that BIT_U*() and GENMASK_U*() are fixed width. v5 -> v6: - No changes. v4 -> v5: - Add brackets to macro names in patch description, e.g. 'REG_GENMASK*' -> 'REG_GENMASK*()' v3 -> v4: - Remove the prefixes in macro parameters, e.g. 'REG_GENMASK(__high, __low)' -> 'REG_GENMASK(high, low)' --- drivers/gpu/drm/i915/i915_reg_defs.h | 108 ++++------------------------------- 1 file changed, 11 insertions(+), 97 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h index e251bcc0c89f5710125bc70f07851b2cb978c89c..e0bc9cf5fa9ed98f7d36f6cb667999aa6522c384 100644 --- a/drivers/gpu/drm/i915/i915_reg_defs.h +++ b/drivers/gpu/drm/i915/i915_reg_defs.h @@ -9,76 +9,19 @@ #include #include -/** - * REG_BIT() - Prepare a u32 bit value - * @__n: 0-based bit number - * - * Local wrapper for BIT() to force u32, with compile time checks. - * - * @return: Value with bit @__n set. +/* + * Wrappers over the generic fixed width BIT_U*() and GENMASK_U*() + * implementations, for compatibility reasons with previous implementation. */ -#define REG_BIT(__n) \ - ((u32)(BIT(__n) + \ - BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \ - ((__n) < 0 || (__n) > 31)))) +#define REG_GENMASK(high, low) GENMASK_U32(high, low) +#define REG_GENMASK64(high, low) GENMASK_U64(high, low) +#define REG_GENMASK16(high, low) GENMASK_U16(high, low) +#define REG_GENMASK8(high, low) GENMASK_U8(high, low) -/** - * REG_BIT8() - Prepare a u8 bit value - * @__n: 0-based bit number - * - * Local wrapper for BIT() to force u8, with compile time checks. - * - * @return: Value with bit @__n set. - */ -#define REG_BIT8(__n) \ - ((u8)(BIT(__n) + \ - BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \ - ((__n) < 0 || (__n) > 7)))) - -/** - * REG_GENMASK() - Prepare a continuous u32 bitmask - * @__high: 0-based high bit - * @__low: 0-based low bit - * - * Local wrapper for GENMASK() to force u32, with compile time checks. - * - * @return: Continuous bitmask from @__high to @__low, inclusive. - */ -#define REG_GENMASK(__high, __low) \ - ((u32)(GENMASK(__high, __low) + \ - BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \ - __is_constexpr(__low) && \ - ((__low) < 0 || (__high) > 31 || (__low) > (__high))))) - -/** - * REG_GENMASK64() - Prepare a continuous u64 bitmask - * @__high: 0-based high bit - * @__low: 0-based low bit - * - * Local wrapper for GENMASK_ULL() to force u64, with compile time checks. - * - * @return: Continuous bitmask from @__high to @__low, inclusive. - */ -#define REG_GENMASK64(__high, __low) \ - ((u64)(GENMASK_ULL(__high, __low) + \ - BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \ - __is_constexpr(__low) && \ - ((__low) < 0 || (__high) > 63 || (__low) > (__high))))) - -/** - * REG_GENMASK8() - Prepare a continuous u8 bitmask - * @__high: 0-based high bit - * @__low: 0-based low bit - * - * Local wrapper for GENMASK() to force u8, with compile time checks. - * - * @return: Continuous bitmask from @__high to @__low, inclusive. - */ -#define REG_GENMASK8(__high, __low) \ - ((u8)(GENMASK(__high, __low) + \ - BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \ - __is_constexpr(__low) && \ - ((__low) < 0 || (__high) > 7 || (__low) > (__high))))) +#define REG_BIT(n) BIT_U32(n) +#define REG_BIT64(n) BIT_U64(n) +#define REG_BIT16(n) BIT_U16(n) +#define REG_BIT8(n) BIT_U8(n) /* * Local integer constant expression version of is_power_of_2(). @@ -143,35 +86,6 @@ */ #define REG_FIELD_GET64(__mask, __val) ((u64)FIELD_GET(__mask, __val)) -/** - * REG_BIT16() - Prepare a u16 bit value - * @__n: 0-based bit number - * - * Local wrapper for BIT() to force u16, with compile time - * checks. - * - * @return: Value with bit @__n set. - */ -#define REG_BIT16(__n) \ - ((u16)(BIT(__n) + \ - BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \ - ((__n) < 0 || (__n) > 15)))) - -/** - * REG_GENMASK16() - Prepare a continuous u8 bitmask - * @__high: 0-based high bit - * @__low: 0-based low bit - * - * Local wrapper for GENMASK() to force u16, with compile time - * checks. - * - * @return: Continuous bitmask from @__high to @__low, inclusive. - */ -#define REG_GENMASK16(__high, __low) \ - ((u16)(GENMASK(__high, __low) + \ - BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \ - __is_constexpr(__low) && \ - ((__low) < 0 || (__high) > 15 || (__low) > (__high))))) /** * REG_FIELD_PREP16() - Prepare a u16 bitfield value