| Message ID | 20250416211929.3502902-1-Frank.Li@nxp.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [1/1] dt-bindings: display: imx: convert ldb.txt to yaml format | expand |
Am Mittwoch, 16. April 2025, 23:19:27 CEST schrieb Frank Li: > Convert ldb.txt to yaml format. > > Additional changes > - fix clock-names order to match existed dts file. > - remove lvds-panel and iomuxc-gpr node in examples. > - fsl,imx6q-ldb fail back to fsl,imx53-ldb. > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > --- > .../bindings/display/imx/fsl,imx6q-ldb.yaml | 182 ++++++++++++++++++ > .../devicetree/bindings/display/imx/ldb.txt | 146 -------------- > 2 files changed, 182 insertions(+), 146 deletions(-) > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml > delete mode 100644 Documentation/devicetree/bindings/display/imx/ldb.txt > > diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml > new file mode 100644 > index 0000000000000..7edd5f28b1372 > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml > @@ -0,0 +1,182 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ldb.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale LVDS Display Bridge (ldb) > + > +description: > + The LVDS Display Bridge device tree node contains up to two lvds-channel > + nodes describing each of the two LVDS encoder channels of the bridge. > + > +maintainers: > + - Frank Li <Frank.Li@nxp.com> > + > +properties: > + compatible: > + oneOf: > + - enum: > + - fsl,imx53-ldb > + - items: > + - const: fsl,imx6q-ldb > + - const: fsl,imx53-ldb My DT bindings foo is not that great, but I would have expected something like this: oneOf: - items: - const: fsl,imx53-ldb - items: - enum: - fsl,imx6q-ldb - const: fsl,imx53-ldb Best regards, Alexander > + > + reg: > + maxItems: 1 > + > + '#address-cells': > + const: 1 > + > + '#size-cells': > + const: 0 > + > + gpr: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + The phandle points to the iomuxc-gpr region containing the LVDS > + control register. > + > + clocks: > + minItems: 6 > + maxItems: 8 > + > + clock-names: > + items: > + - const: di0_pll > + - const: di1_pll > + - const: di0_sel > + - const: di1_sel > + - const: di0 > + - const: di1 > + - const: di2_sel > + - const: di3_sel > + minItems: 6 > + > + fsl,dual-channel: > + $ref: /schemas/types.yaml#/definitions/flag > + description: > + if it exists, only LVDS channel 0 should > + be configured - one input will be distributed on both outputs in dual > + channel mode > + > +patternProperties: > + '^lvds-channel@[0-1]$': > + type: object > + description: > + Each LVDS Channel has to contain either an of graph link to a panel device node > + or a display-timings node that describes the video timings for the connected > + LVDS display as well as the fsl,data-mapping and fsl,data-width properties. > + > + properties: > + reg: > + maxItems: 1 > + > + '#address-cells': > + const: 1 > + > + '#size-cells': > + const: 0 > + > + display-timings: > + $ref: /schemas/display/panel/display-timings.yaml# > + > + fsl,data-mapping: > + enum: > + - spwg > + - jeida > + > + fsl,data-width: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: should be <18> or <24> > + enum: > + - 18 > + - 24 > + > + patternProperties: > + '^port@[0-4]$': > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + description: > + On i.MX5, the internal two-input-multiplexer is used. Due to hardware > + limitations, only one input port (port@[0,1]) can be used for each channel > + (lvds-channel@[0,1], respectively). > + On i.MX6, there should be four input ports (port@[0-3]) that correspond > + to the four LVDS multiplexer inputs. > + A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected > + to a panel input port. Optionally, the output port can be left out if > + display-timings are used instead. > + > + additionalProperties: false > + > +required: > + - compatible > + - gpr > + - clocks > + - clock-names > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/imx5-clock.h> > + > + ldb@53fa8008 { > + compatible = "fsl,imx53-ldb"; > + reg = <0x53fa8008 0x4>; > + #address-cells = <1>; > + #size-cells = <0>; > + gpr = <&gpr>; > + clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, > + <&clks IMX5_CLK_LDB_DI1_SEL>, > + <&clks IMX5_CLK_IPU_DI0_SEL>, > + <&clks IMX5_CLK_IPU_DI1_SEL>, > + <&clks IMX5_CLK_LDB_DI0_GATE>, > + <&clks IMX5_CLK_LDB_DI1_GATE>; > + clock-names = "di0_pll", "di1_pll", > + "di0_sel", "di1_sel", > + "di0", "di1"; > + > + /* Using an of-graph endpoint link to connect the panel */ > + lvds-channel@0 { > + reg = <0>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + endpoint { > + remote-endpoint = <&ipu_di0_lvds0>; > + }; > + }; > + > + port@2 { > + reg = <2>; > + > + endpoint { > + remote-endpoint = <&panel_in>; > + }; > + }; > + }; > + > + /* Using display-timings and fsl,data-mapping/width instead */ > + lvds-channel@1 { > + reg = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + fsl,data-mapping = "spwg"; > + fsl,data-width = <24>; > + > + display-timings {/* ... */ > + }; > + > + port@1 { > + reg = <1>; > + > + endpoint { > + remote-endpoint = <&ipu_di1_lvds1>; > + }; > + }; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/display/imx/ldb.txt b/Documentation/devicetree/bindings/display/imx/ldb.txt > deleted file mode 100644 > index 03653a291b549..0000000000000 > --- a/Documentation/devicetree/bindings/display/imx/ldb.txt > +++ /dev/null > @@ -1,146 +0,0 @@ > -Device-Tree bindings for LVDS Display Bridge (ldb) > - > -LVDS Display Bridge > -=================== > - > -The LVDS Display Bridge device tree node contains up to two lvds-channel > -nodes describing each of the two LVDS encoder channels of the bridge. > - > -Required properties: > - - #address-cells : should be <1> > - - #size-cells : should be <0> > - - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb". > - Both LDB versions are similar, but i.MX6 has an additional > - multiplexer in the front to select any of the four IPU display > - interfaces as input for each LVDS channel. > - - gpr : should be <&gpr> on i.MX53 and i.MX6q. > - The phandle points to the iomuxc-gpr region containing the LVDS > - control register. > -- clocks, clock-names : phandles to the LDB divider and selector clocks and to > - the display interface selector clocks, as described in > - Documentation/devicetree/bindings/clock/clock-bindings.txt > - The following clocks are expected on i.MX53: > - "di0_pll" - LDB LVDS channel 0 mux > - "di1_pll" - LDB LVDS channel 1 mux > - "di0" - LDB LVDS channel 0 gate > - "di1" - LDB LVDS channel 1 gate > - "di0_sel" - IPU1 DI0 mux > - "di1_sel" - IPU1 DI1 mux > - On i.MX6q the following additional clocks are needed: > - "di2_sel" - IPU2 DI0 mux > - "di3_sel" - IPU2 DI1 mux > - The needed clock numbers for each are documented in > - Documentation/devicetree/bindings/clock/imx5-clock.yaml, and in > - Documentation/devicetree/bindings/clock/imx6q-clock.yaml. > - > -Optional properties: > - - pinctrl-names : should be "default" on i.MX53, not used on i.MX6q > - - pinctrl-0 : a phandle pointing to LVDS pin settings on i.MX53, > - not used on i.MX6q > - - fsl,dual-channel : boolean. if it exists, only LVDS channel 0 should > - be configured - one input will be distributed on both outputs in dual > - channel mode > - > -LVDS Channel > -============ > - > -Each LVDS Channel has to contain either an of graph link to a panel device node > -or a display-timings node that describes the video timings for the connected > -LVDS display as well as the fsl,data-mapping and fsl,data-width properties. > - > -Required properties: > - - reg : should be <0> or <1> > - - port: Input and output port nodes with endpoint definitions as defined in > - Documentation/devicetree/bindings/graph.txt. > - On i.MX5, the internal two-input-multiplexer is used. Due to hardware > - limitations, only one input port (port@[0,1]) can be used for each channel > - (lvds-channel@[0,1], respectively). > - On i.MX6, there should be four input ports (port@[0-3]) that correspond > - to the four LVDS multiplexer inputs. > - A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected > - to a panel input port. Optionally, the output port can be left out if > - display-timings are used instead. > - > -Optional properties (required if display-timings are used): > - - display-timings : A node that describes the display timings as defined in > - Documentation/devicetree/bindings/display/panel/display-timing.txt. > - - fsl,data-mapping : should be "spwg" or "jeida" > - This describes how the color bits are laid out in the > - serialized LVDS signal. > - - fsl,data-width : should be <18> or <24> > - > -example: > - > -gpr: iomuxc-gpr@53fa8000 { > - /* ... */ > -}; > - > -ldb: ldb@53fa8008 { > - #address-cells = <1>; > - #size-cells = <0>; > - compatible = "fsl,imx53-ldb"; > - gpr = <&gpr>; > - clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, > - <&clks IMX5_CLK_LDB_DI1_SEL>, > - <&clks IMX5_CLK_IPU_DI0_SEL>, > - <&clks IMX5_CLK_IPU_DI1_SEL>, > - <&clks IMX5_CLK_LDB_DI0_GATE>, > - <&clks IMX5_CLK_LDB_DI1_GATE>; > - clock-names = "di0_pll", "di1_pll", > - "di0_sel", "di1_sel", > - "di0", "di1"; > - > - /* Using an of-graph endpoint link to connect the panel */ > - lvds-channel@0 { > - #address-cells = <1>; > - #size-cells = <0>; > - reg = <0>; > - > - port@0 { > - reg = <0>; > - > - lvds0_in: endpoint { > - remote-endpoint = <&ipu_di0_lvds0>; > - }; > - }; > - > - port@2 { > - reg = <2>; > - > - lvds0_out: endpoint { > - remote-endpoint = <&panel_in>; > - }; > - }; > - }; > - > - /* Using display-timings and fsl,data-mapping/width instead */ > - lvds-channel@1 { > - #address-cells = <1>; > - #size-cells = <0>; > - reg = <1>; > - fsl,data-mapping = "spwg"; > - fsl,data-width = <24>; > - > - display-timings { > - /* ... */ > - }; > - > - port@1 { > - reg = <1>; > - > - lvds1_in: endpoint { > - remote-endpoint = <&ipu_di1_lvds1>; > - }; > - }; > - }; > -}; > - > -panel: lvds-panel { > - /* ... */ > - > - port { > - panel_in: endpoint { > - remote-endpoint = <&lvds0_out>; > - }; > - }; > -}; >
On Thu, Apr 17, 2025 at 08:37:49AM +0200, Alexander Stein wrote: > Am Mittwoch, 16. April 2025, 23:19:27 CEST schrieb Frank Li: > > Convert ldb.txt to yaml format. > > > > Additional changes > > - fix clock-names order to match existed dts file. > > - remove lvds-panel and iomuxc-gpr node in examples. > > - fsl,imx6q-ldb fail back to fsl,imx53-ldb. > > > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > --- > > .../bindings/display/imx/fsl,imx6q-ldb.yaml | 182 ++++++++++++++++++ > > .../devicetree/bindings/display/imx/ldb.txt | 146 -------------- > > 2 files changed, 182 insertions(+), 146 deletions(-) > > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml > > delete mode 100644 Documentation/devicetree/bindings/display/imx/ldb.txt > > > > diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml > > new file mode 100644 > > index 0000000000000..7edd5f28b1372 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml > > @@ -0,0 +1,182 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ldb.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Freescale LVDS Display Bridge (ldb) > > + > > +description: > > + The LVDS Display Bridge device tree node contains up to two lvds-channel > > + nodes describing each of the two LVDS encoder channels of the bridge. > > + > > +maintainers: > > + - Frank Li <Frank.Li@nxp.com> > > + > > +properties: > > + compatible: > > + oneOf: > > + - enum: > > + - fsl,imx53-ldb > > + - items: > > + - const: fsl,imx6q-ldb > > + - const: fsl,imx53-ldb > > My DT bindings foo is not that great, but I would have expected something like this: > oneOf: > - items: > - const: fsl,imx53-ldb enum is correct. if new single compatible string abc added - item; - const: fsl,imx53-ldb - const: abc that means, we have to use two compatible string compatible = "fsl,imx53-ldb", "abc". but here - enum: - fsl,imx53-ldb - abc means only need compatible = "abc" > - items: > - enum: > - fsl,imx6q-ldb Okay! this is little better when need add new compatible string, only need one line change. Frank > - const: fsl,imx53-ldb > > Best regards, > Alexander > > > + > > + reg: > > + maxItems: 1 > > + > > + '#address-cells': > > + const: 1 > > + > > + '#size-cells': > > + const: 0 > > + > > + gpr: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + description: > > + The phandle points to the iomuxc-gpr region containing the LVDS > > + control register. > > + > > + clocks: > > + minItems: 6 > > + maxItems: 8 > > + > > + clock-names: > > + items: > > + - const: di0_pll > > + - const: di1_pll > > + - const: di0_sel > > + - const: di1_sel > > + - const: di0 > > + - const: di1 > > + - const: di2_sel > > + - const: di3_sel > > + minItems: 6 > > + > > + fsl,dual-channel: > > + $ref: /schemas/types.yaml#/definitions/flag > > + description: > > + if it exists, only LVDS channel 0 should > > + be configured - one input will be distributed on both outputs in dual > > + channel mode > > + > > +patternProperties: > > + '^lvds-channel@[0-1]$': > > + type: object > > + description: > > + Each LVDS Channel has to contain either an of graph link to a panel device node > > + or a display-timings node that describes the video timings for the connected > > + LVDS display as well as the fsl,data-mapping and fsl,data-width properties. > > + > > + properties: > > + reg: > > + maxItems: 1 > > + > > + '#address-cells': > > + const: 1 > > + > > + '#size-cells': > > + const: 0 > > + > > + display-timings: > > + $ref: /schemas/display/panel/display-timings.yaml# > > + > > + fsl,data-mapping: > > + enum: > > + - spwg > > + - jeida > > + > > + fsl,data-width: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: should be <18> or <24> > > + enum: > > + - 18 > > + - 24 > > + > > + patternProperties: > > + '^port@[0-4]$': > > + $ref: /schemas/graph.yaml#/$defs/port-base > > + unevaluatedProperties: false > > + description: > > + On i.MX5, the internal two-input-multiplexer is used. Due to hardware > > + limitations, only one input port (port@[0,1]) can be used for each channel > > + (lvds-channel@[0,1], respectively). > > + On i.MX6, there should be four input ports (port@[0-3]) that correspond > > + to the four LVDS multiplexer inputs. > > + A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected > > + to a panel input port. Optionally, the output port can be left out if > > + display-timings are used instead. > > + > > + additionalProperties: false > > + > > +required: > > + - compatible > > + - gpr > > + - clocks > > + - clock-names > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/imx5-clock.h> > > + > > + ldb@53fa8008 { > > + compatible = "fsl,imx53-ldb"; > > + reg = <0x53fa8008 0x4>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + gpr = <&gpr>; > > + clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, > > + <&clks IMX5_CLK_LDB_DI1_SEL>, > > + <&clks IMX5_CLK_IPU_DI0_SEL>, > > + <&clks IMX5_CLK_IPU_DI1_SEL>, > > + <&clks IMX5_CLK_LDB_DI0_GATE>, > > + <&clks IMX5_CLK_LDB_DI1_GATE>; > > + clock-names = "di0_pll", "di1_pll", > > + "di0_sel", "di1_sel", > > + "di0", "di1"; > > + > > + /* Using an of-graph endpoint link to connect the panel */ > > + lvds-channel@0 { > > + reg = <0>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > > + > > + endpoint { > > + remote-endpoint = <&ipu_di0_lvds0>; > > + }; > > + }; > > + > > + port@2 { > > + reg = <2>; > > + > > + endpoint { > > + remote-endpoint = <&panel_in>; > > + }; > > + }; > > + }; > > + > > + /* Using display-timings and fsl,data-mapping/width instead */ > > + lvds-channel@1 { > > + reg = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + fsl,data-mapping = "spwg"; > > + fsl,data-width = <24>; > > + > > + display-timings {/* ... */ > > + }; > > + > > + port@1 { > > + reg = <1>; > > + > > + endpoint { > > + remote-endpoint = <&ipu_di1_lvds1>; > > + }; > > + }; > > + }; > > + }; > > diff --git a/Documentation/devicetree/bindings/display/imx/ldb.txt b/Documentation/devicetree/bindings/display/imx/ldb.txt > > deleted file mode 100644 > > index 03653a291b549..0000000000000 > > --- a/Documentation/devicetree/bindings/display/imx/ldb.txt > > +++ /dev/null > > @@ -1,146 +0,0 @@ > > -Device-Tree bindings for LVDS Display Bridge (ldb) > > - > > -LVDS Display Bridge > > -=================== > > - > > -The LVDS Display Bridge device tree node contains up to two lvds-channel > > -nodes describing each of the two LVDS encoder channels of the bridge. > > - > > -Required properties: > > - - #address-cells : should be <1> > > - - #size-cells : should be <0> > > - - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb". > > - Both LDB versions are similar, but i.MX6 has an additional > > - multiplexer in the front to select any of the four IPU display > > - interfaces as input for each LVDS channel. > > - - gpr : should be <&gpr> on i.MX53 and i.MX6q. > > - The phandle points to the iomuxc-gpr region containing the LVDS > > - control register. > > -- clocks, clock-names : phandles to the LDB divider and selector clocks and to > > - the display interface selector clocks, as described in > > - Documentation/devicetree/bindings/clock/clock-bindings.txt > > - The following clocks are expected on i.MX53: > > - "di0_pll" - LDB LVDS channel 0 mux > > - "di1_pll" - LDB LVDS channel 1 mux > > - "di0" - LDB LVDS channel 0 gate > > - "di1" - LDB LVDS channel 1 gate > > - "di0_sel" - IPU1 DI0 mux > > - "di1_sel" - IPU1 DI1 mux > > - On i.MX6q the following additional clocks are needed: > > - "di2_sel" - IPU2 DI0 mux > > - "di3_sel" - IPU2 DI1 mux > > - The needed clock numbers for each are documented in > > - Documentation/devicetree/bindings/clock/imx5-clock.yaml, and in > > - Documentation/devicetree/bindings/clock/imx6q-clock.yaml. > > - > > -Optional properties: > > - - pinctrl-names : should be "default" on i.MX53, not used on i.MX6q > > - - pinctrl-0 : a phandle pointing to LVDS pin settings on i.MX53, > > - not used on i.MX6q > > - - fsl,dual-channel : boolean. if it exists, only LVDS channel 0 should > > - be configured - one input will be distributed on both outputs in dual > > - channel mode > > - > > -LVDS Channel > > -============ > > - > > -Each LVDS Channel has to contain either an of graph link to a panel device node > > -or a display-timings node that describes the video timings for the connected > > -LVDS display as well as the fsl,data-mapping and fsl,data-width properties. > > - > > -Required properties: > > - - reg : should be <0> or <1> > > - - port: Input and output port nodes with endpoint definitions as defined in > > - Documentation/devicetree/bindings/graph.txt. > > - On i.MX5, the internal two-input-multiplexer is used. Due to hardware > > - limitations, only one input port (port@[0,1]) can be used for each channel > > - (lvds-channel@[0,1], respectively). > > - On i.MX6, there should be four input ports (port@[0-3]) that correspond > > - to the four LVDS multiplexer inputs. > > - A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected > > - to a panel input port. Optionally, the output port can be left out if > > - display-timings are used instead. > > - > > -Optional properties (required if display-timings are used): > > - - display-timings : A node that describes the display timings as defined in > > - Documentation/devicetree/bindings/display/panel/display-timing.txt. > > - - fsl,data-mapping : should be "spwg" or "jeida" > > - This describes how the color bits are laid out in the > > - serialized LVDS signal. > > - - fsl,data-width : should be <18> or <24> > > - > > -example: > > - > > -gpr: iomuxc-gpr@53fa8000 { > > - /* ... */ > > -}; > > - > > -ldb: ldb@53fa8008 { > > - #address-cells = <1>; > > - #size-cells = <0>; > > - compatible = "fsl,imx53-ldb"; > > - gpr = <&gpr>; > > - clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, > > - <&clks IMX5_CLK_LDB_DI1_SEL>, > > - <&clks IMX5_CLK_IPU_DI0_SEL>, > > - <&clks IMX5_CLK_IPU_DI1_SEL>, > > - <&clks IMX5_CLK_LDB_DI0_GATE>, > > - <&clks IMX5_CLK_LDB_DI1_GATE>; > > - clock-names = "di0_pll", "di1_pll", > > - "di0_sel", "di1_sel", > > - "di0", "di1"; > > - > > - /* Using an of-graph endpoint link to connect the panel */ > > - lvds-channel@0 { > > - #address-cells = <1>; > > - #size-cells = <0>; > > - reg = <0>; > > - > > - port@0 { > > - reg = <0>; > > - > > - lvds0_in: endpoint { > > - remote-endpoint = <&ipu_di0_lvds0>; > > - }; > > - }; > > - > > - port@2 { > > - reg = <2>; > > - > > - lvds0_out: endpoint { > > - remote-endpoint = <&panel_in>; > > - }; > > - }; > > - }; > > - > > - /* Using display-timings and fsl,data-mapping/width instead */ > > - lvds-channel@1 { > > - #address-cells = <1>; > > - #size-cells = <0>; > > - reg = <1>; > > - fsl,data-mapping = "spwg"; > > - fsl,data-width = <24>; > > - > > - display-timings { > > - /* ... */ > > - }; > > - > > - port@1 { > > - reg = <1>; > > - > > - lvds1_in: endpoint { > > - remote-endpoint = <&ipu_di1_lvds1>; > > - }; > > - }; > > - }; > > -}; > > - > > -panel: lvds-panel { > > - /* ... */ > > - > > - port { > > - panel_in: endpoint { > > - remote-endpoint = <&lvds0_out>; > > - }; > > - }; > > -}; > > > > > -- > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany > Amtsgericht München, HRB 105018 > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider > http://www.tq-group.com/ > >
diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml new file mode 100644 index 0000000000000..7edd5f28b1372 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml @@ -0,0 +1,182 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ldb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale LVDS Display Bridge (ldb) + +description: + The LVDS Display Bridge device tree node contains up to two lvds-channel + nodes describing each of the two LVDS encoder channels of the bridge. + +maintainers: + - Frank Li <Frank.Li@nxp.com> + +properties: + compatible: + oneOf: + - enum: + - fsl,imx53-ldb + - items: + - const: fsl,imx6q-ldb + - const: fsl,imx53-ldb + + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + gpr: + $ref: /schemas/types.yaml#/definitions/phandle + description: + The phandle points to the iomuxc-gpr region containing the LVDS + control register. + + clocks: + minItems: 6 + maxItems: 8 + + clock-names: + items: + - const: di0_pll + - const: di1_pll + - const: di0_sel + - const: di1_sel + - const: di0 + - const: di1 + - const: di2_sel + - const: di3_sel + minItems: 6 + + fsl,dual-channel: + $ref: /schemas/types.yaml#/definitions/flag + description: + if it exists, only LVDS channel 0 should + be configured - one input will be distributed on both outputs in dual + channel mode + +patternProperties: + '^lvds-channel@[0-1]$': + type: object + description: + Each LVDS Channel has to contain either an of graph link to a panel device node + or a display-timings node that describes the video timings for the connected + LVDS display as well as the fsl,data-mapping and fsl,data-width properties. + + properties: + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + display-timings: + $ref: /schemas/display/panel/display-timings.yaml# + + fsl,data-mapping: + enum: + - spwg + - jeida + + fsl,data-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: should be <18> or <24> + enum: + - 18 + - 24 + + patternProperties: + '^port@[0-4]$': + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + On i.MX5, the internal two-input-multiplexer is used. Due to hardware + limitations, only one input port (port@[0,1]) can be used for each channel + (lvds-channel@[0,1], respectively). + On i.MX6, there should be four input ports (port@[0-3]) that correspond + to the four LVDS multiplexer inputs. + A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected + to a panel input port. Optionally, the output port can be left out if + display-timings are used instead. + + additionalProperties: false + +required: + - compatible + - gpr + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx5-clock.h> + + ldb@53fa8008 { + compatible = "fsl,imx53-ldb"; + reg = <0x53fa8008 0x4>; + #address-cells = <1>; + #size-cells = <0>; + gpr = <&gpr>; + clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, + <&clks IMX5_CLK_LDB_DI1_SEL>, + <&clks IMX5_CLK_IPU_DI0_SEL>, + <&clks IMX5_CLK_IPU_DI1_SEL>, + <&clks IMX5_CLK_LDB_DI0_GATE>, + <&clks IMX5_CLK_LDB_DI1_GATE>; + clock-names = "di0_pll", "di1_pll", + "di0_sel", "di1_sel", + "di0", "di1"; + + /* Using an of-graph endpoint link to connect the panel */ + lvds-channel@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + endpoint { + remote-endpoint = <&ipu_di0_lvds0>; + }; + }; + + port@2 { + reg = <2>; + + endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + + /* Using display-timings and fsl,data-mapping/width instead */ + lvds-channel@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + + display-timings {/* ... */ + }; + + port@1 { + reg = <1>; + + endpoint { + remote-endpoint = <&ipu_di1_lvds1>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/imx/ldb.txt b/Documentation/devicetree/bindings/display/imx/ldb.txt deleted file mode 100644 index 03653a291b549..0000000000000 --- a/Documentation/devicetree/bindings/display/imx/ldb.txt +++ /dev/null @@ -1,146 +0,0 @@ -Device-Tree bindings for LVDS Display Bridge (ldb) - -LVDS Display Bridge -=================== - -The LVDS Display Bridge device tree node contains up to two lvds-channel -nodes describing each of the two LVDS encoder channels of the bridge. - -Required properties: - - #address-cells : should be <1> - - #size-cells : should be <0> - - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb". - Both LDB versions are similar, but i.MX6 has an additional - multiplexer in the front to select any of the four IPU display - interfaces as input for each LVDS channel. - - gpr : should be <&gpr> on i.MX53 and i.MX6q. - The phandle points to the iomuxc-gpr region containing the LVDS - control register. -- clocks, clock-names : phandles to the LDB divider and selector clocks and to - the display interface selector clocks, as described in - Documentation/devicetree/bindings/clock/clock-bindings.txt - The following clocks are expected on i.MX53: - "di0_pll" - LDB LVDS channel 0 mux - "di1_pll" - LDB LVDS channel 1 mux - "di0" - LDB LVDS channel 0 gate - "di1" - LDB LVDS channel 1 gate - "di0_sel" - IPU1 DI0 mux - "di1_sel" - IPU1 DI1 mux - On i.MX6q the following additional clocks are needed: - "di2_sel" - IPU2 DI0 mux - "di3_sel" - IPU2 DI1 mux - The needed clock numbers for each are documented in - Documentation/devicetree/bindings/clock/imx5-clock.yaml, and in - Documentation/devicetree/bindings/clock/imx6q-clock.yaml. - -Optional properties: - - pinctrl-names : should be "default" on i.MX53, not used on i.MX6q - - pinctrl-0 : a phandle pointing to LVDS pin settings on i.MX53, - not used on i.MX6q - - fsl,dual-channel : boolean. if it exists, only LVDS channel 0 should - be configured - one input will be distributed on both outputs in dual - channel mode - -LVDS Channel -============ - -Each LVDS Channel has to contain either an of graph link to a panel device node -or a display-timings node that describes the video timings for the connected -LVDS display as well as the fsl,data-mapping and fsl,data-width properties. - -Required properties: - - reg : should be <0> or <1> - - port: Input and output port nodes with endpoint definitions as defined in - Documentation/devicetree/bindings/graph.txt. - On i.MX5, the internal two-input-multiplexer is used. Due to hardware - limitations, only one input port (port@[0,1]) can be used for each channel - (lvds-channel@[0,1], respectively). - On i.MX6, there should be four input ports (port@[0-3]) that correspond - to the four LVDS multiplexer inputs. - A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected - to a panel input port. Optionally, the output port can be left out if - display-timings are used instead. - -Optional properties (required if display-timings are used): - - display-timings : A node that describes the display timings as defined in - Documentation/devicetree/bindings/display/panel/display-timing.txt. - - fsl,data-mapping : should be "spwg" or "jeida" - This describes how the color bits are laid out in the - serialized LVDS signal. - - fsl,data-width : should be <18> or <24> - -example: - -gpr: iomuxc-gpr@53fa8000 { - /* ... */ -}; - -ldb: ldb@53fa8008 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx53-ldb"; - gpr = <&gpr>; - clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, - <&clks IMX5_CLK_LDB_DI1_SEL>, - <&clks IMX5_CLK_IPU_DI0_SEL>, - <&clks IMX5_CLK_IPU_DI1_SEL>, - <&clks IMX5_CLK_LDB_DI0_GATE>, - <&clks IMX5_CLK_LDB_DI1_GATE>; - clock-names = "di0_pll", "di1_pll", - "di0_sel", "di1_sel", - "di0", "di1"; - - /* Using an of-graph endpoint link to connect the panel */ - lvds-channel@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - port@0 { - reg = <0>; - - lvds0_in: endpoint { - remote-endpoint = <&ipu_di0_lvds0>; - }; - }; - - port@2 { - reg = <2>; - - lvds0_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; - }; - - /* Using display-timings and fsl,data-mapping/width instead */ - lvds-channel@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - fsl,data-mapping = "spwg"; - fsl,data-width = <24>; - - display-timings { - /* ... */ - }; - - port@1 { - reg = <1>; - - lvds1_in: endpoint { - remote-endpoint = <&ipu_di1_lvds1>; - }; - }; - }; -}; - -panel: lvds-panel { - /* ... */ - - port { - panel_in: endpoint { - remote-endpoint = <&lvds0_out>; - }; - }; -};
Convert ldb.txt to yaml format. Additional changes - fix clock-names order to match existed dts file. - remove lvds-panel and iomuxc-gpr node in examples. - fsl,imx6q-ldb fail back to fsl,imx53-ldb. Signed-off-by: Frank Li <Frank.Li@nxp.com> --- .../bindings/display/imx/fsl,imx6q-ldb.yaml | 182 ++++++++++++++++++ .../devicetree/bindings/display/imx/ldb.txt | 146 -------------- 2 files changed, 182 insertions(+), 146 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml delete mode 100644 Documentation/devicetree/bindings/display/imx/ldb.txt