From patchwork Tue Nov 29 10:12:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jean-Francois Moine X-Patchwork-Id: 9451737 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8931260710 for ; Tue, 29 Nov 2016 11:37:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 40DE727FE4 for ; Tue, 29 Nov 2016 11:37:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 357892818A; Tue, 29 Nov 2016 11:37:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8C12C27FE4 for ; Tue, 29 Nov 2016 11:37:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BAE736E1E0; Tue, 29 Nov 2016 11:37:06 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp1-g21.free.fr (smtp1-g21.free.fr [212.27.42.1]) by gabe.freedesktop.org (Postfix) with ESMTPS id B71FB6E1E0 for ; Tue, 29 Nov 2016 11:37:02 +0000 (UTC) Received: from localhost (unknown [37.164.15.172]) by smtp1-g21.free.fr (Postfix) with ESMTP id 042E4B00535; Tue, 29 Nov 2016 12:37:00 +0100 (CET) X-Mailbox-Line: From 431252931ed44a3bafaba80843bb4066ab73ed9e Mon Sep 17 00:00:00 2001 Message-Id: <431252931ed44a3bafaba80843bb4066ab73ed9e.1480414715.git.moinejf@free.fr> In-Reply-To: References: From: Jean-Francois Moine Date: Tue, 29 Nov 2016 11:12:15 +0100 Subject: [PATCH v7 6/8] ARM: dts: sun8i-h3: add HDMI video nodes To: Dave Airlie , Maxime Ripard , Rob Herring Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Jean-Francois Moine --- Note 1: The DE clock is not set in the driver. Instead, it is set at system startup time by 'assigned-clocks', but there is a problem in sunxi-ng which uses readl_relaxed_poll_timeout(), and, as noticed by Ondřej Jirman, this function is not available at startup time. The fix of this problem is not part of this patchset series. Note 2: The DE clock is set to a high enough rate (432MHz). It seems that this is needed to handle 4K video. But, as the proposed DE driver does not treat yet 4K video, the clock could be set to a lower rate. For example, the default rate for the A83T is 250MHz (no 4K video). --- arch/arm/boot/dts/sun8i-h3.dtsi | 65 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index fca66bf..1aa087d 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -140,6 +140,16 @@ #size-cells = <1>; ranges; + de: de-controller@01000000 { + compatible = "allwinner,sun8i-h3-display-engine"; + reg = <0x01000000 0x400000>; + clocks = <&ccu CLK_BUS_DE>, <&ccu CLK_DE>; + clock-names = "bus", "clock"; + resets = <&ccu RST_BUS_DE>; + ports = <&tcon0_p>, <&tcon1_p>; + status = "disabled"; + }; + dma: dma-controller@01c02000 { compatible = "allwinner,sun8i-h3-dma"; reg = <0x01c02000 0x1000>; @@ -149,6 +159,37 @@ #dma-cells = <1>; }; + tcon0: lcd-controller@01c0c000 { + compatible = "allwinner,sun8i-a83t-tcon"; + reg = <0x01c0c000 0x400>; + clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; + clock-names = "bus", "clock"; + resets = <&ccu RST_BUS_TCON0>; + interrupts = ; + status = "disabled"; + tcon0_p: port { + tcon0_hdmi: endpoint { + remote-endpoint = <&hdmi_tcon0>; + }; + }; + }; + + /* not used */ + tcon1: lcd-controller@01c0d000 { + compatible = "allwinner,sun8i-h3-tcon"; + reg = <0x01c0d000 0x400>; + clocks = <&ccu CLK_BUS_TCON1>, + <&ccu CLK_TCON0>; /* no clock */ + clock-names = "bus", "clock"; + interrupts = ; + status = "disabled"; + tcon1_p: port { + endpoint { + /* empty */ + }; + }; + }; + mmc0: mmc@01c0f000 { compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c0f000 0x1000>; @@ -314,6 +355,11 @@ clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; + + assigned-clocks = <&ccu CLK_PLL_DE>, + <&ccu CLK_DE>; + assigned-clock-rates = <864000000>, + <432000000>; }; pio: pinctrl@01c20800 { @@ -567,6 +613,25 @@ interrupts = ; }; + hdmi: hdmi@01ee0000 { + compatible = "allwinner,sun8i-h3-hdmi"; + reg = <0x01ee0000 0x20000>; + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI>, + <&ccu CLK_HDMI_DDC>; + clock-names = "bus", "clock", "ddc-clock"; + resets = <&ccu RST_BUS_HDMI0>, <&ccu RST_BUS_HDMI1>; + reset-names = "hdmi0", "hdmi1"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + port@0 { /* video */ + reg = <0>; + hdmi_tcon0: endpoint { + remote-endpoint = <&tcon0_hdmi>; + }; + }; + }; + rtc: rtc@01f00000 { compatible = "allwinner,sun6i-a31-rtc"; reg = <0x01f00000 0x54>;