From patchwork Tue Sep 9 01:15:52 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Michel_D=C3=A4nzer?= X-Patchwork-Id: 4865151 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 431BEC0338 for ; Tue, 9 Sep 2014 01:16:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 73EFA200F0 for ; Tue, 9 Sep 2014 01:16:02 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 2C82C200EC for ; Tue, 9 Sep 2014 01:16:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3B7196E364; Mon, 8 Sep 2014 18:15:58 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.gna.ch (darkcity.gna.ch [195.226.6.51]) by gabe.freedesktop.org (Postfix) with ESMTP id 8CD2E6E0DF; Mon, 8 Sep 2014 18:15:56 -0700 (PDT) Received: from thor (125-14-38-183.rev.home.ne.jp [125.14.38.183]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by darkcity.gna.ch (Postfix) with ESMTPSA id E6327C0739; Tue, 9 Sep 2014 03:15:53 +0200 (CEST) Received: from localhost ([127.0.0.1]) by thor with esmtp (Exim 4.84) (envelope-from ) id 1XRA2C-0002wP-O9; Tue, 09 Sep 2014 10:15:52 +0900 Message-ID: <540E54C8.8030500@daenzer.net> Date: Tue, 09 Sep 2014 10:15:52 +0900 From: =?windows-1252?Q?Michel_D=E4nzer?= User-Agent: Mozilla/5.0 (X11; Linux ppc; rv:31.0) Gecko/20100101 Icedove/31.0 MIME-Version: 1.0 To: Alex Deucher Subject: Re: [Mesa-dev] [PATCH] drm/radeon: Add RADEON_GEM_CPU_ACCESS BO creation flag References: <1409208961-7322-1-git-send-email-michel@daenzer.net> <53FEEEF4.7030401@vodafone.de> <53FFDB6B.5050105@daenzer.net> <540E4E28.50701@daenzer.net> In-Reply-To: <540E4E28.50701@daenzer.net> Cc: "mesa-dev@lists.freedesktop.org" , Maling list - DRI developers X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-6.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 09.09.2014 09:47, Michel Dänzer wrote: > On 09.09.2014 02:36, Alex Deucher wrote: >> >> Updated version with comments integrated. > > [...] > >> @@ -314,10 +314,12 @@ int radeon_bo_pin_restricted(struct radeon_bo >> *bo, u32 domain, u64 max_offset, >> unsigned lpfn = 0; >> >> /* force to pin into visible video ram */ >> - if (bo->placements[i].flags & TTM_PL_FLAG_VRAM) >> - lpfn = bo->rdev->mc.visible_vram_size >> PAGE_SHIFT; >> - else >> + if (bo->placements[i].flags & TTM_PL_FLAG_VRAM) { >> + if (!(bo->flags & RADEON_GEM_NO_CPU_ACCESS)) >> + lpfn = bo->rdev->mc.visible_vram_size >> PAGE_SHIFT; >> + } else { >> lpfn = bo->rdev->mc.gtt_size >> PAGE_SHIFT; /* ??? */ >> + } > > The else block can be removed as well, but that can be done in another > patch. Actually, I just noticed a problem, the following if statement: > if (max_offset) > lpfn = min (lpfn, (unsigned)(max_offset >> PAGE_SHIFT)); This will ignore max_offset if lpfn is 0. So either go with v1 of this hunk, or rebase on top of the patch below. From: =?UTF-8?q?Michel=20D=C3=A4nzer?= Date: Tue, 9 Sep 2014 10:09:23 +0900 Subject: [PATCH] drm/radeon: Clean up assignment of TTM placement lpfn member for pinning MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Michel Dänzer --- drivers/gpu/drm/radeon/radeon_object.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 908ea541..8ec8150 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c @@ -307,18 +307,14 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset, } radeon_ttm_placement_from_domain(bo, domain); for (i = 0; i < bo->placement.num_placement; i++) { - unsigned lpfn = 0; - /* force to pin into visible video ram */ if (bo->placements[i].flags & TTM_PL_FLAG_VRAM) - lpfn = bo->rdev->mc.visible_vram_size >> PAGE_SHIFT; + bo->placements[i].lpfn = + min(bo->rdev->mc.visible_vram_size, max_offset) + >> PAGE_SHIFT; else - lpfn = bo->rdev->mc.gtt_size >> PAGE_SHIFT; /* ??? */ - - if (max_offset) - lpfn = min (lpfn, (unsigned)(max_offset >> PAGE_SHIFT)); + bo->placements[i].lpfn = max_offset >> PAGE_SHIFT; - bo->placements[i].lpfn = lpfn; bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT; }