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Mon, 21 Nov 2022 07:27:42 +0000 From: Sandor Yu To: andrzej.hajda@intel.com, neil.armstrong@linaro.org, robert.foss@linaro.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, kishon@ti.com, vkoul@kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, alexander.stein@ew.tq-group.com Subject: [PATCH v4 07/10] dt-bindings: phy: Add Cadence HDP-TX DP PHY Date: Mon, 21 Nov 2022 15:23:57 +0800 Message-Id: <5f8a3f15f744e201171c20505e1e3c47f5a27dce.1669013346.git.Sandor.yu@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: X-ClientProxiedBy: SG2PR06CA0246.apcprd06.prod.outlook.com (2603:1096:4:ac::30) To PAXPR04MB9448.eurprd04.prod.outlook.com (2603:10a6:102:2b1::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB9448:EE_|AS8PR04MB7638:EE_ X-MS-Office365-Filtering-Correlation-Id: 9fbd77de-61ee-48f4-1bc6-08dacb91e02d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Sandor Yu --- .../bindings/phy/cdns,hdptx-dp-phy.yaml | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml b/Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml new file mode 100644 index 000000000000..b997c15ff0bb --- /dev/null +++ b/Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/cdns,hdptx-dp-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cadence HDP-TX(HDMI/DisplayPort) PHY for DisplayPort protocol + +maintainers: + - Sandor Yu + +properties: + compatible: + enum: + - cdns,hdptx-dp-phy + + reg: + maxItems: 1 + + clocks: + items: + - description: PHY reference clock. + - description: APB clock. + + clock-names: + items: + - const: refclk + - const: apbclk + + "#phy-cells": + const: 0 + + cdns,num-lanes: + description: + Number of lanes. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2, 3, 4] + default: 4 + + cdns,max-bit-rate: + description: + Maximum DisplayPort link bit rate to use, in Mbps + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [2160, 2430, 2700, 3240, 4320, 5400] + default: 5400 + +required: + - compatible + - reg + - clocks + - clock-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include + #include + dp_phy: phy@32c00000 { + compatible = "cdns,hdptx-dp-phy"; + reg = <0x32c00000 0x100000>; + #phy-cells = <0>; + clocks = <&hdmi_phy_27m>, <&clk IMX8MQ_CLK_DISP_APB_ROOT>; + clock-names = "refclk", "apbclk"; + cdns,num-lanes = <4>; + cdns,max-bit-rate = <5400>; + };