| Message ID | 6NXsveJa7IUiRftZcOguXi1dj0UifPcrDRtR1oOgrU@cp3-web-009.plabs.ch (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/fourcc: fix AMD modifiers PACKERS field doc | expand |
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> On Sun, Nov 15, 2020 at 10:39 AM Simon Ser <contact@emersion.fr> wrote: > > This field doesn't alias with BANK_XOR_BITS: PACKERS is bits 26:28 while > BANK_XOR_BITS is bits 23:25. > > Fixes: 8ba16d599374 ("drm/fourcc: Add AMD DRM modifiers.") > Signed-off-by: Simon Ser <contact@emersion.fr> > Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> > Cc: Alex Deucher <alexdeucher@gmail.com> > Cc: Daniel Vetter <daniel@ffwll.ch> > --- > include/uapi/drm/drm_fourcc.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > index ca48ed0e6bc1..29c7a8694479 100644 > --- a/include/uapi/drm/drm_fourcc.h > +++ b/include/uapi/drm/drm_fourcc.h > @@ -1196,7 +1196,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > #define AMD_FMT_MOD_PIPE_XOR_BITS_MASK 0x7 > #define AMD_FMT_MOD_BANK_XOR_BITS_SHIFT 23 > #define AMD_FMT_MOD_BANK_XOR_BITS_MASK 0x7 > -#define AMD_FMT_MOD_PACKERS_SHIFT 26 /* aliases with BANK_XOR_BITS */ > +#define AMD_FMT_MOD_PACKERS_SHIFT 26 > #define AMD_FMT_MOD_PACKERS_MASK 0x7 > #define AMD_FMT_MOD_RB_SHIFT 29 > #define AMD_FMT_MOD_RB_MASK 0x7 > -- > 2.29.2 > >
Applied and updated based on the corrected layout. Thanks! Alex On Sun, Nov 15, 2020 at 10:48 AM Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> wrote: > > Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> > > On Sun, Nov 15, 2020 at 10:39 AM Simon Ser <contact@emersion.fr> wrote: > > > > This field doesn't alias with BANK_XOR_BITS: PACKERS is bits 26:28 while > > BANK_XOR_BITS is bits 23:25. > > > > Fixes: 8ba16d599374 ("drm/fourcc: Add AMD DRM modifiers.") > > Signed-off-by: Simon Ser <contact@emersion.fr> > > Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> > > Cc: Alex Deucher <alexdeucher@gmail.com> > > Cc: Daniel Vetter <daniel@ffwll.ch> > > --- > > include/uapi/drm/drm_fourcc.h | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > > index ca48ed0e6bc1..29c7a8694479 100644 > > --- a/include/uapi/drm/drm_fourcc.h > > +++ b/include/uapi/drm/drm_fourcc.h > > @@ -1196,7 +1196,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > > #define AMD_FMT_MOD_PIPE_XOR_BITS_MASK 0x7 > > #define AMD_FMT_MOD_BANK_XOR_BITS_SHIFT 23 > > #define AMD_FMT_MOD_BANK_XOR_BITS_MASK 0x7 > > -#define AMD_FMT_MOD_PACKERS_SHIFT 26 /* aliases with BANK_XOR_BITS */ > > +#define AMD_FMT_MOD_PACKERS_SHIFT 26 > > #define AMD_FMT_MOD_PACKERS_MASK 0x7 > > #define AMD_FMT_MOD_RB_SHIFT 29 > > #define AMD_FMT_MOD_RB_MASK 0x7 > > -- > > 2.29.2 > > > >
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index ca48ed0e6bc1..29c7a8694479 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -1196,7 +1196,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) #define AMD_FMT_MOD_PIPE_XOR_BITS_MASK 0x7 #define AMD_FMT_MOD_BANK_XOR_BITS_SHIFT 23 #define AMD_FMT_MOD_BANK_XOR_BITS_MASK 0x7 -#define AMD_FMT_MOD_PACKERS_SHIFT 26 /* aliases with BANK_XOR_BITS */ +#define AMD_FMT_MOD_PACKERS_SHIFT 26 #define AMD_FMT_MOD_PACKERS_MASK 0x7 #define AMD_FMT_MOD_RB_SHIFT 29 #define AMD_FMT_MOD_RB_MASK 0x7
This field doesn't alias with BANK_XOR_BITS: PACKERS is bits 26:28 while BANK_XOR_BITS is bits 23:25. Fixes: 8ba16d599374 ("drm/fourcc: Add AMD DRM modifiers.") Signed-off-by: Simon Ser <contact@emersion.fr> Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Cc: Alex Deucher <alexdeucher@gmail.com> Cc: Daniel Vetter <daniel@ffwll.ch> --- include/uapi/drm/drm_fourcc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)