From patchwork Mon Oct 27 05:24:58 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joe Perches X-Patchwork-Id: 5157051 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 75E60C11AD for ; Mon, 27 Oct 2014 05:25:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A1284202F8 for ; Mon, 27 Oct 2014 05:25:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 96E88202B8 for ; Mon, 27 Oct 2014 05:25:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C01B56E09C; Sun, 26 Oct 2014 22:25:24 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtprelay.hostedemail.com (smtprelay0228.hostedemail.com [216.40.44.228]) by gabe.freedesktop.org (Postfix) with ESMTP id A08F86E09C for ; Sun, 26 Oct 2014 22:25:23 -0700 (PDT) Received: from filter.hostedemail.com (ff-bigip1 [10.5.19.254]) by smtprelay06.hostedemail.com (Postfix) with ESMTP id A27029EA11; Mon, 27 Oct 2014 05:25:22 +0000 (UTC) X-Session-Marker: 6A6F6540706572636865732E636F6D X-Spam-Summary: 2, 0, 0, , d41d8cd98f00b204, joe@perches.com, :::::::::, RULES_HIT:41:355:379:541:800:960:973:988:989:1260:1345:1359:1437:1534:1541:1711:1730:1747:1777:1792:2393:2559:2562:3138:3139:3140:3141:3142:3352:3865:3866:3867:3868:3871:4321:4605:5007:6261:10004:10848:11026:11473:11657:11658:11914:12043:12296:12438:12517:12519:12555:13311:13357:14096:14394:21080, 0, RBL:none, CacheIP:none, Bayesian:0.5, 0.5, 0.5, Netcheck:none, DomainCache:0, MSF:not bulk, SPF:fn, MSBL:0, DNSBL:none, Custom_rules:0:0:0 X-HE-Tag: song43_4be82254c9d0e X-Filterd-Recvd-Size: 1883 Received: from joe-laptop.perches.com (pool-71-103-235-196.lsanca.fios.verizon.net [71.103.235.196]) (Authenticated sender: joe@perches.com) by omf11.hostedemail.com (Postfix) with ESMTPA; Mon, 27 Oct 2014 05:25:21 +0000 (UTC) From: Joe Perches To: linux-kernel@vger.kernel.org, Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= Subject: [PATCH 02/11] radeon: evergreen: Fix probable mask then right shift defects Date: Sun, 26 Oct 2014 22:24:58 -0700 Message-Id: <88c64cce88264069e0e1637fc874e699e5b226f6.1414387334.git.joe@perches.com> X-Mailer: git-send-email 2.1.2 In-Reply-To: References: Cc: dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Precedence of & and >> is not the same and is not left to right. shift has higher precedence and should be done after the mask. Add parentheses around the mask. Use the already #defined values instead of hardcoding. Signed-off-by: Joe Perches --- drivers/gpu/drm/radeon/evergreen.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index a31f1ca..a97a685 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -3303,7 +3303,8 @@ static void evergreen_gpu_init(struct radeon_device *rdev) rdev->config.evergreen.tile_config |= ((gb_addr_config & 0x30000000) >> 28) << 12; - num_shader_engines = (gb_addr_config & NUM_SHADER_ENGINES(3) >> 12) + 1; + num_shader_engines = ((gb_addr_config & NUM_SHADER_ENGINES_MASK) + >> NUM_SHADER_ENGINES) + 1; if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK)) { u32 efuse_straps_4;