From patchwork Wed May 8 19:10:38 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christopher Harvey X-Patchwork-Id: 2544921 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id C1381DF24C for ; Thu, 9 May 2013 18:02:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 99641E64C5 for ; Thu, 9 May 2013 11:02:26 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mtxmxout6.matrox.com (mtxmxout6.matrox.com [138.11.2.96]) by gabe.freedesktop.org (Postfix) with ESMTP id 0F7C0E64D3 for ; Thu, 9 May 2013 10:59:01 -0700 (PDT) Received: from mars.matrox.com (mars.matrox.com [192.168.1.29]) by mtxmxout6.matrox.com (Postfix) with ESMTP id B102B1D7542 for ; Thu, 9 May 2013 13:59:00 -0400 (EDT) Received: (from ssmsp@localhost) by mars.matrox.com (8.14.4/8.13.2) id r49Hx0vD011287 for dri-devel@lists.freedesktop.org; Thu, 9 May 2013 13:59:00 -0400 Received: from localhost (localhost.localdomain [127.0.0.1]) by mars.matrox.com (Postfix) with ESMTP id 336689523F for ; Thu, 9 May 2013 13:59:00 -0400 (EDT) X-Virus-MTX-Scanned: by Matrox Virus scanner at mars.matrox.com Received: from pluton.matrox.com (pluton.matrox.com [192.168.8.7]) by mars.matrox.com (Postfix) with ESMTP id 0C9D8951ED for ; Thu, 9 May 2013 13:59:00 -0400 (EDT) Received: from matrox.com (dyn-152-224.matrox.com [192.168.152.224]) by pluton.matrox.com (Postfix) with ESMTP id 072197F45F; Thu, 9 May 2013 13:59:00 -0400 (EDT) Message-Id: <88d5c51b355b61506aace57c01617df9b94dcc46.1368122227.git.charvey@matrox.com> In-Reply-To: References: From: Christopher Harvey Date: Wed, 8 May 2013 15:10:38 -0400 Subject: [PATCH 4/4] drm/mgag200: Fix framebuffer base address programming To: dri-devel@lists.freedesktop.org Cc: Mathieu Larouche X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Higher bits of the base address of framebuffers weren't being programmed properly. This caused framebuffers that didn't happen to be allocated at a low enough address to not be displayed properly. Signed-off-by: Christopher Harvey Signed-off-by: Mathieu Larouche --- drivers/gpu/drm/mgag200/mgag200_mode.c | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 6dbf6de..77b8a45 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -654,12 +654,26 @@ static void mga_g200wb_commit(struct drm_crtc *crtc) WREG_DAC(MGA1064_GEN_IO_DATA, tmp); } - +/* + This is how the framebuffer base address is stored in g200 cards: + * Assume @offset is the gpu_addr variable of the framebuffer object + * Then addr is the number of _pixels_ (not bytes) from the start of + VRAM to the first pixel we want to display. (divided by 2 for 32bit + framebuffers) + * addr is stored in the CRTCEXT0, CRTCC and CRTCD registers + addr<20> -> CRTCEXT0<6> + addr<19-16> -> CRTCEXT0<3-0> + addr<15-8> -> CRTCC<7-0> + addr<7-0> -> CRTCD<7-0> + CRTCEXT0 has to be programmed last to trigger an update and make the + new addr variable take effect. + */ void mga_set_start_address(struct drm_crtc *crtc, unsigned offset) { struct mga_device *mdev = crtc->dev->dev_private; u32 addr; int count; + u8 crtcext0; while (RREG8(0x1fda) & 0x08); while (!(RREG8(0x1fda) & 0x08)); @@ -667,10 +681,17 @@ void mga_set_start_address(struct drm_crtc *crtc, unsigned offset) count = RREG8(MGAREG_VCOUNT) + 2; while (RREG8(MGAREG_VCOUNT) < count); - addr = offset >> 2; + WREG8(MGAREG_CRTCEXT_INDEX, 0); + crtcext0 = RREG8(MGAREG_CRTCEXT_DATA); + crtcext0 &= 0xB0; + addr = offset / 8; + /* Can't store addresses any higher than that... + but we also don't have more than 16MB of memory, so it should be fine. */ + WARN_ON(addr > 0x1fffff); + crtcext0 |= (!!(addr & (1<<20)))<<6; WREG_CRT(0x0d, (u8)(addr & 0xff)); WREG_CRT(0x0c, (u8)(addr >> 8) & 0xff); - WREG_CRT(0xaf, (u8)(addr >> 16) & 0xf); + WREG_ECRT(0x0, ((u8)(addr >> 16) & 0xf) | crtcext0); }