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[05/13] drm/kms/mode/gma500-mdfld_dsi_dpi: using helper function drm_display_mode_to_videomode for calculating timing parameters

Message ID 8998a71d799fe807fa199c0bf0d63ea5bff0985c.1525087679.git.satendra.t@samsung.com (mailing list archive)
State New, archived
Headers show

Commit Message

Satendra Singh Thakur May 3, 2018, 8:46 a.m. UTC 
To avoid duplicate logic for the same

Signed-off-by: Satendra Singh Thakur <satendra.t@samsung.com>
Cc: Madhur Verma <madhur.verma@samsung.com>
Cc: Hemanshu Srivastava <hemanshu.s@samsung.com>
---
 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c | 28 ++++++++++------------------
 1 file changed, 10 insertions(+), 18 deletions(-)
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Patch

diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c
index a05c0206..0ac3e1f 100644
--- a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c
+++ b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c
@@ -24,7 +24,7 @@ 
  * jim liu <jim.liu@intel.com>
  * Jackie Li<yaodong.li@intel.com>
  */
-
+#include <video/videomode.h>
 #include "mdfld_dsi_dpi.h"
 #include "mdfld_output.h"
 #include "mdfld_dsi_pkg_sender.h"
@@ -429,36 +429,28 @@  int mdfld_dsi_dpi_timing_calculation(struct drm_display_mode *mode,
 				struct mdfld_dsi_dpi_timing *dpi_timing,
 				int num_lane, int bpp)
 {
-	int pclk_hsync, pclk_hfp, pclk_hbp, pclk_hactive;
-	int pclk_vsync, pclk_vfp, pclk_vbp;
-
-	pclk_hactive = mode->hdisplay;
-	pclk_hfp = mode->hsync_start - mode->hdisplay;
-	pclk_hsync = mode->hsync_end - mode->hsync_start;
-	pclk_hbp = mode->htotal - mode->hsync_end;
+	struct videomode vm;
 
-	pclk_vfp = mode->vsync_start - mode->vdisplay;
-	pclk_vsync = mode->vsync_end - mode->vsync_start;
-	pclk_vbp = mode->vtotal - mode->vsync_end;
+	drm_display_mode_to_videomode(mode, &vm);
 
 	/*
 	 * byte clock counts were calculated by following formula
 	 * bclock_count = pclk_count * bpp / num_lane / 8
 	 */
 	dpi_timing->hsync_count = mdfld_dsi_dpi_to_byte_clock_count(
-						pclk_hsync, num_lane, bpp);
+						vm.hsync_len, num_lane, bpp);
 	dpi_timing->hbp_count = mdfld_dsi_dpi_to_byte_clock_count(
-						pclk_hbp, num_lane, bpp);
+						vm.hback_porch, num_lane, bpp);
 	dpi_timing->hfp_count = mdfld_dsi_dpi_to_byte_clock_count(
-						pclk_hfp, num_lane, bpp);
+						vm.hfront_porch, num_lane, bpp);
 	dpi_timing->hactive_count = mdfld_dsi_dpi_to_byte_clock_count(
-						pclk_hactive, num_lane, bpp);
+						vm.hactive, num_lane, bpp);
 	dpi_timing->vsync_count = mdfld_dsi_dpi_to_byte_clock_count(
-						pclk_vsync, num_lane, bpp);
+						vm.vsync_len, num_lane, bpp);
 	dpi_timing->vbp_count = mdfld_dsi_dpi_to_byte_clock_count(
-						pclk_vbp, num_lane, bpp);
+						vm.vback_porch, num_lane, bpp);
 	dpi_timing->vfp_count = mdfld_dsi_dpi_to_byte_clock_count(
-						pclk_vfp, num_lane, bpp);
+						vm.vfront_porch, num_lane, bpp);
 
 	return 0;
 }