From patchwork Tue Oct 16 14:06:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10643583 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9AABC1057 for ; Tue, 16 Oct 2018 14:06:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 896961FFB2 for ; Tue, 16 Oct 2018 14:06:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7D42929FD2; Tue, 16 Oct 2018 14:06:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3CE411FFB2 for ; Tue, 16 Oct 2018 14:06:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B67806E238; Tue, 16 Oct 2018 14:06:25 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-qk1-x744.google.com (mail-qk1-x744.google.com [IPv6:2607:f8b0:4864:20::744]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6020A6E238 for ; Tue, 16 Oct 2018 14:06:24 +0000 (UTC) Received: by mail-qk1-x744.google.com with SMTP id p6-v6so14200313qkg.1 for ; Tue, 16 Oct 2018 07:06:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=IHmA9/EmWgyNJ/j0tH5pwV2vKtHCsdnc+Kpq2lRGI6w=; b=HZSEJjCRGMfjlnR5+HV1YP1Fw7Sudg9mjZB9KeC/0BgyyZBnlTgsNvxfPPOB9Zap6q WeqCw7p9fGkesb7qX45eBL6subuJPS9rrVXBX6gM87ua4UcSl/q42Dz5LRCUy4RYqFU2 1a3EUin+zfspytJax4/LQi960KpCZcG2HuXf1Ic33sa8jsTqLibihVAHaHSIvzxRS8JS Vm+idm8cxxjEvT3IrBU+56UZc8dUmeIDWQ0g0bLZko5/ez7GX3XMELMatnyXzhIWw/Af roQjCVhMLbQ5/s978U2XYvZt2SBh/A7tm/CprLI1eongp01DkzcyWepH1R3oSjVSusZb b2AQ== X-Gm-Message-State: ABuFfojM2tReKSSUpBlbEiyZQF49tUQLeVUAt4s66At6KOpc+KQjJ5XP imzASnaxab41iLDd0N9o81l0iFEw2gHGcrob9uLpWw== X-Google-Smtp-Source: ACcGV608eUpdnmnmj0/48egsmAfp155ZsGnfCR59O0OPrPoM1Z5bmj30/Kl0EXg5FMrKkI10sfACH6EQcaSA/vAYOa8= X-Received: by 2002:a37:1f53:: with SMTP id f80-v6mr19783700qkf.109.1539698783398; Tue, 16 Oct 2018 07:06:23 -0700 (PDT) MIME-Version: 1.0 From: Linus Walleij Date: Tue, 16 Oct 2018 16:06:10 +0200 Message-ID: Subject: RFC: DSI panel lane frequency To: Andrzej Hajda , "open list:DRM PANEL DRIVERS" , Thierry Reding , Vinay Simha BN , Archit Taneja , Chandan Uddaraju X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Hi folks, I just randomly add some people that committed code to the DSI core so I can get some reasonable feedback. I started looking at some DSI drivers I'm adding and it seems this platform (Ux500 MCDE) can control the bus frequency of the DSI interface. It can be controlled independently for command and video mode, and there is an LP (low power) frequency and a HS (high speed) frequency for the lane. The MIPI specification seems to say "The maximum Lane frequency shall be documented by the DSI device manufacturer." Then it goes on to specify tolerance for the HS and LP frequency. So apparently those are not standard frequencies. I was thinking to add something like this: LS/HS frequency? (If zero, we could assume some default I guess.) Yours, Linus Walleij diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 4fef19064b0f..9c78eb78b027 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -168,6 +168,8 @@ struct mipi_dsi_device_info { * @format: pixel format for video mode * @lanes: number of active data lanes * @mode_flags: DSI operation mode related flags + * @hs_frequency: Maximum frequency for high speed operation + * @lp_frequency: Maximum frequency for low power operation */ struct mipi_dsi_device { struct mipi_dsi_host *host; @@ -178,6 +180,8 @@ struct mipi_dsi_device { unsigned int lanes; enum mipi_dsi_pixel_format format; unsigned long mode_flags; + unsigned long hs_frequency; + unsigned long lp_frequency; }; Is this what we should do to make DSI panels expose their max