diff mbox

radeon 0000:02:00.0: GPU lockup CP stall for more than 10000msec

Message ID CADnq5_MMk51H+Zy9GT9esfm_ndVqYzwU4t_6tYHu9zzSiqSr9g@mail.gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Alex Deucher Jan. 10, 2013, 8:47 p.m. UTC 
On Thu, Jan 10, 2013 at 3:32 PM, Borislav Petkov <bp@alien8.de> wrote:
> On Thu, Jan 10, 2013 at 11:21:21AM -0500, Alex Deucher wrote:
>> I'm assuming you didn't also update your userspace gfx stack?
>
> By that you mean x.org etc, right? Or GPU microcode too? In any case, I
> haven't touched any of those deliberately, AFAICR at least.

Right.  Xorg drivers or mesa drivers.

>
>> Does disabling the new DMA ring for ttm bo moves avoid the issue?
>
> How do I do that?



>
> Thanks.
>
> --
> Regards/Gruss,
>     Boris.
>
> Sent from a fat crate under my desk. Formatting is fine.
> --

Comments

Borislav Petkov Jan. 11, 2013, 11:43 a.m. UTC | #1 
On Thu, Jan 10, 2013 at 03:47:01PM -0500, Alex Deucher wrote:
> >> Does disabling the new DMA ring for ttm bo moves avoid the issue?
> >
> > How do I do that?
> 
> diff --git a/drivers/gpu/drm/radeon/radeon_asic.c
> b/drivers/gpu/drm/radeon/radeon_asic.c
> index 9056faf..b0cc46d 100644

[ … ]

Ok, I'm running -rc3 with this and will watch it for any changes in
behavior.

Thanks.
Borislav Petkov Jan. 15, 2013, 12:19 p.m. UTC | #2 
On Fri, Jan 11, 2013 at 12:43:36PM +0100, Borislav Petkov wrote:
> Ok, I'm running -rc3 with this and will watch it for any changes in
> behavior.

AFAICT, this fixes the CP stalls, for I haven't seen any of them in
dmesg for the last couple of days after applying your revert.

Thanks.
diff mbox

Patch

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c
b/drivers/gpu/drm/radeon/radeon_asic.c
index 9056faf..b0cc46d 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -974,8 +974,8 @@  static struct radeon_asic r600_asic = {
                .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
                .dma = &r600_copy_dma,
                .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
-               .copy = &r600_copy_dma,
-               .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
+               .copy = &r600_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
        },
        .surface = {
                .set_reg = r600_set_surface_reg,
@@ -1058,8 +1058,8 @@  static struct radeon_asic rs780_asic = {
                .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
                .dma = &r600_copy_dma,
                .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
-               .copy = &r600_copy_dma,
-               .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
+               .copy = &r600_copy_blit,
+               .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
        },
        .surface = {
                .set_reg = r600_set_surface_reg,