From patchwork Thu Jan 30 20:14:20 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 3559121 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5495B9F381 for ; Thu, 30 Jan 2014 20:14:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5797920173 for ; Thu, 30 Jan 2014 20:14:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id D282320160 for ; Thu, 30 Jan 2014 20:14:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 76878101333; Thu, 30 Jan 2014 12:14:22 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-ve0-f176.google.com (mail-ve0-f176.google.com [209.85.128.176]) by gabe.freedesktop.org (Postfix) with ESMTP id 17152101333 for ; Thu, 30 Jan 2014 12:14:20 -0800 (PST) Received: by mail-ve0-f176.google.com with SMTP id oz11so2472864veb.21 for ; Thu, 30 Jan 2014 12:14:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=nVUbmA1yZJq6qbMFZqXe8oTmNVqryTHC2JvmvCuaNSw=; b=be4ID7X2H5d/MDt+Z8IXYS8w/mqbnfsjXoL76RA51gs6DKNLXClcs6QR2ZS/1jZU3D iCBnDijSb7RdeuN3WHP1rlsH2nYQJhkaHTxvVKKIQcuUL+SZQXmiMB3ZBibwkm5Q3dtE IhDewPa7QbwxszDI0Hi1vs+d30g+Uzfpf4nAdLO4JnAAk3olrDtR1TrKDDJQfvWrcDWF gIJ2Ye119FOzLvCXsiTn6+UTDLSbpjuKklGLgYMVeNA7A0moOr+X7pe+3Pi84oGKUOrI F0pKuLTtyVSVRzFT3vlu1l/6Kc7hwGJ82Aew+w6jrdUL2W8VJJ7PabPPHZ76sLDRwEQh XBMw== MIME-Version: 1.0 X-Received: by 10.58.49.161 with SMTP id v1mr13188448ven.5.1391112860209; Thu, 30 Jan 2014 12:14:20 -0800 (PST) Received: by 10.58.172.129 with HTTP; Thu, 30 Jan 2014 12:14:20 -0800 (PST) In-Reply-To: <1391055072-27876-1-git-send-email-airlied@gmail.com> References: <1391055072-27876-1-git-send-email-airlied@gmail.com> Date: Thu, 30 Jan 2014 15:14:20 -0500 Message-ID: Subject: Re: [PATCH] drm/radeon: allow geom rings to be setup on r600/r700 From: Alex Deucher To: Dave Airlie Cc: Maling list - DRI developers X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP I made some minor cleanups and also added a missing 7xx reg to the safe regs list. Alex On Wed, Jan 29, 2014 at 11:11 PM, Dave Airlie wrote: > From: Dave Airlie > > the evergreen CS parser has allowed this for a while, just port > the code to the r600 one. > > This is required before geom shaders can be made work. > > Signed-off-by: Dave Airlie > --- > drivers/gpu/drm/radeon/r600_cs.c | 18 ++++++++++++++++-- > drivers/gpu/drm/radeon/radeon_drv.c | 3 ++- > 2 files changed, 18 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c > index 7b399dc..98e1f6b 100644 > --- a/drivers/gpu/drm/radeon/r600_cs.c > +++ b/drivers/gpu/drm/radeon/r600_cs.c > @@ -1007,8 +1007,22 @@ static int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) > case R_008C64_SQ_VSTMP_RING_SIZE: > case R_0288C8_SQ_GS_VERT_ITEMSIZE: > /* get value to populate the IB don't remove */ > - tmp =radeon_get_ib_value(p, idx); > - ib[idx] = 0; > + // tmp =radeon_get_ib_value(p, idx); > + // ib[idx] = 0; > + break; > + case SQ_ESGS_RING_BASE: > + case SQ_GSVS_RING_BASE: > + case SQ_ESTMP_RING_BASE: > + case SQ_GSTMP_RING_BASE: > + case SQ_PSTMP_RING_BASE: > + case SQ_VSTMP_RING_BASE: > + r = radeon_cs_packet_next_reloc(p, &reloc, 0); > + if (r) { > + dev_warn(p->dev, "bad SET_CONTEXT_REG " > + "0x%04X\n", reg); > + return -EINVAL; > + } > + ib[idx] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); > break; > case SQ_CONFIG: > track->sq_config = radeon_get_ib_value(p, idx); > diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c > index ec8c388..357cffb 100644 > --- a/drivers/gpu/drm/radeon/radeon_drv.c > +++ b/drivers/gpu/drm/radeon/radeon_drv.c > @@ -78,9 +78,10 @@ > * 2.34.0 - Add CIK tiling mode array query > * 2.35.0 - Add CIK macrotile mode array query > * 2.36.0 - Fix CIK DCE tiling setup > + * 2.37.0 - allow ring setup on r6xx/r7xx > */ > #define KMS_DRIVER_MAJOR 2 > -#define KMS_DRIVER_MINOR 36 > +#define KMS_DRIVER_MINOR 37 > #define KMS_DRIVER_PATCHLEVEL 0 > int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); > int radeon_driver_unload_kms(struct drm_device *dev); > -- > 1.8.3.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel From 4c79afe26e0aace9fc1497b72db4508308f91f08 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 30 Jan 2014 14:11:12 +1000 Subject: [PATCH] drm/radeon: allow geom rings to be setup on r600/r700 (v2) the evergreen CS parser has allowed this for a while, just port the code to the r600 one. This is required before geom shaders can be made work. v2: agd5f: minor cleanup and add additional 7xx reg. Signed-off-by: Dave Airlie Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/r600_cs.c | 18 ++++++++++++++++-- drivers/gpu/drm/radeon/radeon_drv.c | 3 ++- drivers/gpu/drm/radeon/reg_srcs/r600 | 1 + 3 files changed, 19 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 7b399dc..2812c7d1a 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c @@ -1007,8 +1007,22 @@ static int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) case R_008C64_SQ_VSTMP_RING_SIZE: case R_0288C8_SQ_GS_VERT_ITEMSIZE: /* get value to populate the IB don't remove */ - tmp =radeon_get_ib_value(p, idx); - ib[idx] = 0; + /*tmp =radeon_get_ib_value(p, idx); + ib[idx] = 0;*/ + break; + case SQ_ESGS_RING_BASE: + case SQ_GSVS_RING_BASE: + case SQ_ESTMP_RING_BASE: + case SQ_GSTMP_RING_BASE: + case SQ_PSTMP_RING_BASE: + case SQ_VSTMP_RING_BASE: + r = radeon_cs_packet_next_reloc(p, &reloc, 0); + if (r) { + dev_warn(p->dev, "bad SET_CONTEXT_REG " + "0x%04X\n", reg); + return -EINVAL; + } + ib[idx] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); break; case SQ_CONFIG: track->sq_config = radeon_get_ib_value(p, idx); diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index ec8c388..84a1bbb7 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -78,9 +78,10 @@ * 2.34.0 - Add CIK tiling mode array query * 2.35.0 - Add CIK macrotile mode array query * 2.36.0 - Fix CIK DCE tiling setup + * 2.37.0 - allow GS ring setup on r6xx/r7xx */ #define KMS_DRIVER_MAJOR 2 -#define KMS_DRIVER_MINOR 36 +#define KMS_DRIVER_MINOR 37 #define KMS_DRIVER_PATCHLEVEL 0 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); int radeon_driver_unload_kms(struct drm_device *dev); diff --git a/drivers/gpu/drm/radeon/reg_srcs/r600 b/drivers/gpu/drm/radeon/reg_srcs/r600 index 20bfbda..ec0c682 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/r600 +++ b/drivers/gpu/drm/radeon/reg_srcs/r600 @@ -18,6 +18,7 @@ r600 0x9400 0x00028A3C VGT_GROUP_VECT_1_FMT_CNTL 0x00028A40 VGT_GS_MODE 0x00028A6C VGT_GS_OUT_PRIM_TYPE +0x00028B38 VGT_GS_MAX_VERT_OUT 0x000088C8 VGT_GS_PER_ES 0x000088E8 VGT_GS_PER_VS 0x000088D4 VGT_GS_VERTEX_REUSE -- 1.8.3.1