From patchwork Thu Aug 7 13:59:58 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 4691311 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3093DC0338 for ; Thu, 7 Aug 2014 14:00:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DF180201DE for ; Thu, 7 Aug 2014 14:00:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 37593201B4 for ; Thu, 7 Aug 2014 14:00:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A9E506E02B; Thu, 7 Aug 2014 07:00:09 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-qg0-f52.google.com (mail-qg0-f52.google.com [209.85.192.52]) by gabe.freedesktop.org (Postfix) with ESMTP id 6F7E589D02 for ; Thu, 7 Aug 2014 07:00:08 -0700 (PDT) Received: by mail-qg0-f52.google.com with SMTP id f51so4341866qge.39 for ; Thu, 07 Aug 2014 07:00:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=Rp9rkDzzjAQDTsS6UIeg+rBJ+6xwcm0QxKnsoXJorTw=; b=JMj2TNipZoqA/8aOG+8F2zZAt/Kz9aaHIzQQgTIHoPO5RKUFYRL7W2sZrB3DiUdYPm OCsdnXO5/Otw6VNzvCedBkHk4epJC3BHX/Adr51HU4C6FQdb8DxSaeF0Eaxcwm47JSIA nvLapv3gMdcPyNi5DkXKRmml0bjOdmIgY2+wJWxBBoRfG90T70z2qhuUJsdntbCF9GQ4 to0ju1xqMQIcZUDinjXkPr7Rrgm1ARYG9XlJRbel2864UT8dS/tmB877kuA5HrsvgQrl EtSYd3WZojlvrQ14enMY4yqizVwGMzanpfwzDo2tV6zuWwL5QmnUCE6ZwktjJy0tgsaS 1zVw== MIME-Version: 1.0 X-Received: by 10.224.120.138 with SMTP id d10mr28267947qar.55.1407419998780; Thu, 07 Aug 2014 06:59:58 -0700 (PDT) Received: by 10.140.103.71 with HTTP; Thu, 7 Aug 2014 06:59:58 -0700 (PDT) In-Reply-To: <1407397616-23934-1-git-send-email-michel@daenzer.net> References: <1407397616-23934-1-git-send-email-michel@daenzer.net> Date: Thu, 7 Aug 2014 09:59:58 -0400 Message-ID: Subject: Re: [PATCH] drm/radeon: Always flush VM again on < CIK From: Alex Deucher To: =?UTF-8?Q?Michel_D=C3=A4nzer?= Cc: Maling list - DRI developers X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Thu, Aug 7, 2014 at 3:46 AM, Michel Dänzer wrote: > From: Michel Dänzer > > Not doing this causes piglit hangs[0] on my Cape Verde card. No issues on > Bonaire and Kaveri though. > > [0] Same symptoms as those fixed on CIK by 'drm/radeon: set VM base addr > using the PFP v2'. > > Signed-off-by: Michel Dänzer We should be using PFP as much as possible. Does the attached patch help? Alex > --- > drivers/gpu/drm/radeon/radeon_vm.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c > index ccae4d9..898cbb7 100644 > --- a/drivers/gpu/drm/radeon/radeon_vm.c > +++ b/drivers/gpu/drm/radeon/radeon_vm.c > @@ -238,7 +238,9 @@ void radeon_vm_flush(struct radeon_device *rdev, > uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory); > > /* if we can't remember our last VM flush then flush now! */ > - if (!vm->last_flush || pd_addr != vm->pd_gpu_addr) { > + /* XXX figure out why we have to flush all the time before CIK */ > + if (rdev->family < CHIP_BONAIRE || > + !vm->last_flush || pd_addr != vm->pd_gpu_addr) { > trace_radeon_vm_flush(pd_addr, ring, vm->id); > vm->pd_gpu_addr = pd_addr; > radeon_ring_vm_flush(rdev, ring, vm); > -- > 2.0.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel From e58fc941419a1be461cd202a337a9d7baf11fc36 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Thu, 7 Aug 2014 09:57:21 -0400 Subject: [PATCH] drm/radeon: use pfp for all vm_flush related updates May fix hangs in some cases. Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org --- drivers/gpu/drm/radeon/cik.c | 8 ++++---- drivers/gpu/drm/radeon/si.c | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index b625646..e7d99e1 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c @@ -5958,14 +5958,14 @@ void cik_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) /* update SH_MEM_* regs */ radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); - radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | + radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) | WRITE_DATA_DST_SEL(0))); radeon_ring_write(ring, SRBM_GFX_CNTL >> 2); radeon_ring_write(ring, 0); radeon_ring_write(ring, VMID(vm->id)); radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 6)); - radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | + radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) | WRITE_DATA_DST_SEL(0))); radeon_ring_write(ring, SH_MEM_BASES >> 2); radeon_ring_write(ring, 0); @@ -5976,7 +5976,7 @@ void cik_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) radeon_ring_write(ring, 0); /* SH_MEM_APE1_LIMIT */ radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); - radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | + radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) | WRITE_DATA_DST_SEL(0))); radeon_ring_write(ring, SRBM_GFX_CNTL >> 2); radeon_ring_write(ring, 0); @@ -5987,7 +5987,7 @@ void cik_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) /* bits 0-15 are the VM contexts0-15 */ radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); - radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | + radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) | WRITE_DATA_DST_SEL(0))); radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2); radeon_ring_write(ring, 0); diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 011779b..dbd9d81 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -5028,7 +5028,7 @@ void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) /* flush hdp cache */ radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); - radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | + radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(1) | WRITE_DATA_DST_SEL(0))); radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2); radeon_ring_write(ring, 0); @@ -5036,7 +5036,7 @@ void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) /* bits 0-15 are the VM contexts0-15 */ radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); - radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | + radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(1) | WRITE_DATA_DST_SEL(0))); radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2); radeon_ring_write(ring, 0); -- 1.8.3.1