@@ -229,12 +229,12 @@ decode_mi(struct drm_intel_decode *ctx)
const char *post_sync_op = "";
uint32_t *data = ctx->data;
- struct {
+ static const struct {
uint32_t opcode;
int len_mask;
unsigned int min_len;
unsigned int max_len;
- const char *name;
+ const char name[24];
int (*func)(struct drm_intel_decode *ctx);
} opcodes_mi[] = {
{ 0x08, 0, 1, 1, "MI_ARB_ON_OFF" },
@@ -420,11 +420,11 @@ decode_2d(struct drm_intel_decode *ctx)
unsigned int opcode, len;
uint32_t *data = ctx->data;
- struct {
+ static const struct {
uint32_t opcode;
unsigned int min_len;
unsigned int max_len;
- const char *name;
+ const char name[38];
} opcodes_2d[] = {
{ 0x40, 5, 5, "COLOR_BLT" },
{ 0x43, 6, 6, "SRC_COPY_BLT" },
@@ -1271,12 +1271,12 @@ decode_3d_1d(struct drm_intel_decode *ctx)
uint32_t *data = ctx->data;
uint32_t devid = ctx->devid;
- struct {
+ static const struct {
uint32_t opcode;
int i830_only;
unsigned int min_len;
unsigned int max_len;
- const char *name;
+ const char name[34];
} opcodes_3d_1d[] = {
{ 0x86, 0, 4, 4, "3DSTATE_CHROMA_KEY" },
{ 0x88, 0, 2, 2, "3DSTATE_CONSTANT_BLEND_COLOR" },
@@ -2543,11 +2543,11 @@ decode_3d(struct drm_intel_decode *ctx)
unsigned int idx;
uint32_t *data = ctx->data;
- struct {
+ static const struct {
uint32_t opcode;
unsigned int min_len;
unsigned int max_len;
- const char *name;
+ const char name[34];
} opcodes_3d[] = {
{ 0x06, 1, 1, "3DSTATE_ANTI_ALIASING" },
{ 0x08, 1, 1, "3DSTATE_BACKFACE_STENCIL_OPS" },
@@ -3138,12 +3138,12 @@ decode_3d_965(struct drm_intel_decode *ctx)
uint32_t *data = ctx->data;
uint32_t devid = ctx->devid;
- struct {
+ static const struct {
uint32_t opcode;
uint32_t len_mask;
int unsigned min_len;
int unsigned max_len;
- const char *name;
+ const char name[34];
int gen;
int (*func)(struct drm_intel_decode *ctx);
} opcodes_3d[] = {
@@ -3169,8 +3169,8 @@ decode_3d_965(struct drm_intel_decode *ctx)
{ 0x780a, 0x00ff, 3, 3, "3DSTATE_INDEX_BUFFER" },
{ 0x780b, 0xffff, 1, 1, "3DSTATE_VF_STATISTICS" },
{ 0x780d, 0x00ff, 4, 4, "3DSTATE_VIEWPORT_STATE_POINTERS" },
- { 0x780e, 0xffff, 4, 4, NULL, 6, gen6_3DSTATE_CC_STATE_POINTERS },
- { 0x780e, 0x00ff, 2, 2, NULL, 7, gen7_3DSTATE_CC_STATE_POINTERS },
+ { 0x780e, 0xffff, 4, 4, "", 6, gen6_3DSTATE_CC_STATE_POINTERS },
+ { 0x780e, 0x00ff, 2, 2, "", 7, gen7_3DSTATE_CC_STATE_POINTERS },
{ 0x780f, 0x00ff, 2, 2, "3DSTATE_SCISSOR_POINTERS" },
{ 0x7810, 0x00ff, 6, 6, "3DSTATE_VS" },
{ 0x7811, 0x00ff, 7, 7, "3DSTATE_GS" },
@@ -3194,10 +3194,10 @@ decode_3d_965(struct drm_intel_decode *ctx)
{ 0x781e, 0x00ff, 3, 3, "3DSTATE_STREAMOUT" },
{ 0x781f, 0x00ff, 14, 14, "3DSTATE_SBE" },
{ 0x7820, 0x00ff, 8, 8, "3DSTATE_PS" },
- { 0x7821, 0x00ff, 2, 2, NULL, 7,
gen7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP },
- { 0x7823, 0x00ff, 2, 2, NULL, 7, gen7_3DSTATE_VIEWPORT_STATE_POINTERS_CC },
- { 0x7824, 0x00ff, 2, 2, NULL, 7, gen7_3DSTATE_BLEND_STATE_POINTERS },
- { 0x7825, 0x00ff, 2, 2, NULL, 7, gen7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS },
+ { 0x7821, 0x00ff, 2, 2, "", 7, gen7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP },
+ { 0x7823, 0x00ff, 2, 2, "", 7, gen7_3DSTATE_VIEWPORT_STATE_POINTERS_CC },
+ { 0x7824, 0x00ff, 2, 2, "", 7, gen7_3DSTATE_BLEND_STATE_POINTERS },
+ { 0x7825, 0x00ff, 2, 2, "", 7, gen7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS },
{ 0x7826, 0x00ff, 2, 2, "3DSTATE_BINDING_TABLE_POINTERS_VS" },
{ 0x7827, 0x00ff, 2, 2, "3DSTATE_BINDING_TABLE_POINTERS_HS" },