From patchwork Mon Oct 5 14:29:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 7327981 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5E4EC9F2F7 for ; Mon, 5 Oct 2015 14:30:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 60860206AD for ; Mon, 5 Oct 2015 14:30:05 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 820DF206AA for ; Mon, 5 Oct 2015 14:30:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CFFF16E978; Mon, 5 Oct 2015 07:30:00 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-yk0-f182.google.com (mail-yk0-f182.google.com [209.85.160.182]) by gabe.freedesktop.org (Postfix) with ESMTPS id 429B66E978 for ; Mon, 5 Oct 2015 07:30:00 -0700 (PDT) Received: by ykdz138 with SMTP id z138so172171176ykd.2 for ; Mon, 05 Oct 2015 07:29:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=cPvWAezP9HMsnjRZz6wDIdjdf/fxCTXqTljUOMYIRkM=; b=kU5XwwiBWXwMFFQ1vk9V/0pTKZ2kZ4eWWBRLx0Rat4WKCJ6TXdfQ35lYjZUZd8GEv1 eLcV92/fuq9K6hYSq1sNzkoM5XJ8zYsXXm3guAAgV7MMos/t4jYt5MyCYEca0H9n2WNu J5OZkPEvWR75Eu5Ay0GhnqKdyuE7Bihkrl47pw8SCbTsKDLSIO+uaRIcfB1Rdn6t8Tom 4TihNr3CJ+43qTacZradrz/hyNBofwbJSqAvKaFc+TC7RBqy3RMCE0Pps7yVThrDGuMZ aHk5gk0zYGrQ7w3nB1//GOUgDaUcusimugYgFrHk/HI55wJvAtY/p5ePNPhOfAWSEagU MM9g== MIME-Version: 1.0 X-Received: by 10.129.105.86 with SMTP id e83mr10778367ywc.10.1444055399364; Mon, 05 Oct 2015 07:29:59 -0700 (PDT) Received: by 10.13.227.4 with HTTP; Mon, 5 Oct 2015 07:29:59 -0700 (PDT) In-Reply-To: <1444054931-2147-5-git-send-email-robdclark@gmail.com> References: <1444054931-2147-1-git-send-email-robdclark@gmail.com> <1444054931-2147-5-git-send-email-robdclark@gmail.com> Date: Mon, 5 Oct 2015 10:29:59 -0400 Message-ID: Subject: Re: [PATCH 4/5] qcom-scm: add support to restore secure config From: Rob Clark To: "dri-devel@lists.freedesktop.org" , linux-arm-msm Cc: Stephen Boyd , Bjorn Andersson X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Mon, Oct 5, 2015 at 10:22 AM, Rob Clark wrote: > Needed by OCMEM driver. > > Signed-off-by: Rob Clark > --- Note: I am contemplating squashing something like this in: ---------------- dumpster-diving the downstream kernel, there is a mix of hard-coding dev-id in code, vs taking it out of devicetree. But in cases where it comes from devicetree, it seems like it is always using the same values across different SoCs. But I may be missing something.. and since downstream kernel branches tend to shed support for older generations I may not be going far enough back in time.. BR, -R > drivers/firmware/qcom_scm-32.c | 20 ++++++++++++++++++++ > drivers/firmware/qcom_scm-64.c | 5 +++++ > drivers/firmware/qcom_scm.c | 22 ++++++++++++++++++++++ > drivers/firmware/qcom_scm.h | 5 +++++ > include/linux/qcom_scm.h | 3 +++ > 5 files changed, 55 insertions(+) > > diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c > index c1e4325..a7bf6d4 100644 > --- a/drivers/firmware/qcom_scm-32.c > +++ b/drivers/firmware/qcom_scm-32.c > @@ -500,6 +500,26 @@ int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp) > req, req_cnt * sizeof(*req), resp, sizeof(*resp)); > } > > +int __qcom_scm_restore_sec_config(u32 sec_id, u32 ctx_bank_num) > +{ > + int ret, scm_ret = 0; > + struct msm_scm_sec_cfg { > + __le32 id; > + __le32 ctx_bank_num; > + } cfg; > + > + cfg.id = cpu_to_le32(sec_id); > + cfg.ctx_bank_num = cpu_to_le32(sec_id); > + > + ret = qcom_scm_call(QCOM_SCM_MP_SVC, QCOM_SCM_MP_RESTORE_SEC_CFG, > + &cfg, sizeof(cfg), &scm_ret, sizeof(scm_ret)); > + > + if (ret || scm_ret) > + return ret ? ret : -EINVAL; > + > + return 0; > +} > + > bool __qcom_scm_pas_supported(u32 peripheral) > { > __le32 out; > diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c > index e64fd92..7329cf0f 100644 > --- a/drivers/firmware/qcom_scm-64.c > +++ b/drivers/firmware/qcom_scm-64.c > @@ -62,6 +62,11 @@ int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp) > return -ENOTSUPP; > } > > +int __qcom_scm_restore_sec_config(u32 sec_id, u32 ctx_bank_num) > +{ > + return -ENOTSUPP; > +} > + > bool __qcom_scm_pas_supported(u32 peripheral) > { > return false; > diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c > index 39082c1..8f43c0b 100644 > --- a/drivers/firmware/qcom_scm.c > +++ b/drivers/firmware/qcom_scm.c > @@ -154,6 +154,28 @@ int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp) > EXPORT_SYMBOL(qcom_scm_hdcp_req); > > /** > + * qcom_scm_restore_sec_config_available() - Check if secure environment > + * supports restore security config interface. > + * > + * Return true if restore-cfg interface is supported, false if not. > + */ > +bool qcom_scm_restore_sec_config_available(void) > +{ > + return __qcom_scm_is_call_available(QCOM_SCM_MP_SVC, > + QCOM_SCM_MP_RESTORE_SEC_CFG); > +} > +EXPORT_SYMBOL(qcom_scm_restore_sec_config_available); > + > +/** > + * qcom_scm_restore_sec_config() - call restore-cfg interface > + */ > +int qcom_scm_restore_sec_config(unsigned sec_id) > +{ > + return __qcom_scm_restore_sec_config(sec_id, 0); > +} > +EXPORT_SYMBOL(qcom_scm_restore_sec_config); > + > +/** > * qcom_scm_pas_supported() - Check if the peripheral authentication service is > * available for the given peripherial > * @peripheral: peripheral id > diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h > index 220d19c..3085616 100644 > --- a/drivers/firmware/qcom_scm.h > +++ b/drivers/firmware/qcom_scm.h > @@ -36,6 +36,11 @@ extern int __qcom_scm_is_call_available(u32 svc_id, u32 cmd_id); > extern int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, > u32 *resp); > > +#define QCOM_SCM_MP_SVC 0xc > +#define QCOM_SCM_MP_RESTORE_SEC_CFG 0x2 > + > +extern int __qcom_scm_restore_sec_config(u32 sec_id, u32 ctx_bank_num); > + > #define QCOM_SCM_SVC_PIL 0x2 > #define QCOM_SCM_PAS_INIT_IMAGE_CMD 0x1 > #define QCOM_SCM_PAS_MEM_SETUP_CMD 0x2 > diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h > index e407c0a..7be3d91 100644 > --- a/include/linux/qcom_scm.h > +++ b/include/linux/qcom_scm.h > @@ -32,6 +32,9 @@ extern bool qcom_scm_hdcp_available(void); > extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, > u32 *resp); > > +extern bool qcom_scm_restore_sec_config_available(void); > +extern int qcom_scm_restore_sec_config(unsigned sec_id); > + > extern bool qcom_scm_pas_supported(u32 peripheral); > extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size); > extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size); > -- > 2.4.3 > diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index beadca4..d3f209d 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -32,8 +32,18 @@ extern bool qcom_scm_hdcp_available(void); extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp); +enum qcom_scm_sec_dev_id { + QCOM_SCM_MDSS_DEV_ID = 1, + QCOM_SCM_OCMEM_DEV_ID = 5, + QCOM_SCM_PCIE0_DEV_ID = 11, + QCOM_SCM_PCIE1_DEV_ID = 12, + QCOM_SCM_GFX_DEV_ID = 18, + QCOM_SCM_UFS_DEV_ID = 19, + QCOM_SCM_ICE_DEV_ID = 20, +}; + extern bool qcom_scm_restore_sec_config_available(void); -extern int qcom_scm_restore_sec_config(unsigned sec_id); +extern int qcom_scm_restore_sec_config(enum qcom_scm_sec_dev_id sec_id); ---------------- The thing I am unsure about is whether the device-id's are always stable across different parts. From what I can tell from