diff mbox

drm/i2c: tda998x: power down pre-filter and color conversion

Message ID E1c5DG8-00087L-FT@rmk-PC.armlinux.org.uk (mailing list archive)
State New, archived
Headers show

Commit Message

Russell King (Oracle) Nov. 11, 2016, 2:56 p.m. UTC
Disabling the pre-filter block of the TDA998x saves 40mW and the colour
conversion block saves 15mW.  As we always disable these two blocks, we
can power these sections of the chip down to save 55mW of unnecessary
power consumption.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
This is the next patch in my ongoing TDA998x work, which applies on top
of my previously sent series (and my drm-tda998x-devel branch.)  Please
can folk with TDA998x test on their platforms that there has been no
apparent regression.  Thanks.

 drivers/gpu/drm/i2c/tda998x_drv.c | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c
index 3a5e5c466972..bf5eec0c1b4f 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -107,6 +107,8 @@  struct tda998x_priv {
 # define I2C_MASTER_DIS_FILT      (1 << 1)
 # define I2C_MASTER_APP_STRT_LAT  (1 << 2)
 #define REG_FEAT_POWERDOWN        REG(0x00, 0x0e)     /* read/write */
+# define FEAT_POWERDOWN_PREFILT   BIT(0)
+# define FEAT_POWERDOWN_CSC       BIT(1)
 # define FEAT_POWERDOWN_SPDIF     (1 << 3)
 #define REG_INT_FLAGS_0           REG(0x00, 0x0f)     /* read/write */
 #define REG_INT_FLAGS_1           REG(0x00, 0x10)     /* read/write */
@@ -1284,6 +1286,7 @@  tda998x_encoder_mode_set(struct drm_encoder *encoder,
 	/* no pre-filter or interpolator: */
 	reg_write(priv, REG_HVF_CNTRL_0, HVF_CNTRL_0_PREFIL(0) |
 			HVF_CNTRL_0_INTPOL(0));
+	reg_set(priv, REG_FEAT_POWERDOWN, FEAT_POWERDOWN_PREFILT);
 	reg_write(priv, REG_VIP_CNTRL_5, VIP_CNTRL_5_SP_CNT(0));
 	reg_write(priv, REG_VIP_CNTRL_4, VIP_CNTRL_4_BLANKIT(0) |
 			VIP_CNTRL_4_BLC(0));
@@ -1306,6 +1309,7 @@  tda998x_encoder_mode_set(struct drm_encoder *encoder,
 	/* set color matrix bypass flag: */
 	reg_write(priv, REG_MAT_CONTRL, MAT_CONTRL_MAT_BP |
 				MAT_CONTRL_MAT_SC(1));
+	reg_set(priv, REG_FEAT_POWERDOWN, FEAT_POWERDOWN_CSC);
 
 	/* set BIAS tmds value: */
 	reg_write(priv, REG_ANA_GENERAL, 0x09);