diff mbox series

drm/i915:Remove unused parameter in marco.

Message ID F84191BE8AA4A690+20240831135114.497043-1-helugang@uniontech.com (mailing list archive)
State New, archived
Headers show
Series drm/i915:Remove unused parameter in marco. | expand

Commit Message

He Lugang Aug. 31, 2024, 1:51 p.m. UTC 
The parameter dev_priv is actually not used in macro PORT_ALPM_CTL
and PORT_ALPM_LFPS_CTL,so remove it to simplify the code.

Signed-off-by: He Lugang <helugang@uniontech.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c     | 4 ++--
 drivers/gpu/drm/i915/display/intel_psr.c      | 2 +-
 drivers/gpu/drm/i915/display/intel_psr_regs.h | 4 ++--
 3 files changed, 5 insertions(+), 5 deletions(-)

Comments

Rodrigo Vivi Sept. 5, 2024, 5:04 p.m. UTC | #1 
On Sat, Aug 31, 2024 at 09:51:14PM +0800, He Lugang wrote:
> The parameter dev_priv is actually not used in macro PORT_ALPM_CTL
> and PORT_ALPM_LFPS_CTL,so remove it to simplify the code.

It is magically used on our back... hence the build failures that CI got.
Jani is doing a great clean-up work on the display code to get rid
of this 'dev_priv' usages in favor of a better display code separation
and using intel_display struct.

But thanks for the patch and the interest to help.

> 
> Signed-off-by: He Lugang <helugang@uniontech.com>
> ---
>  drivers/gpu/drm/i915/display/intel_alpm.c     | 4 ++--
>  drivers/gpu/drm/i915/display/intel_psr.c      | 2 +-
>  drivers/gpu/drm/i915/display/intel_psr_regs.h | 4 ++--
>  3 files changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 82ee778b2efe..7a93ba627aa6 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -330,7 +330,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
>  			ALPM_CTL_AUX_LESS_WAKE_TIME(intel_dp->alpm_parameters.aux_less_wake_lines);
>  
>  		intel_de_write(display,
> -			       PORT_ALPM_CTL(display, port),
> +			       PORT_ALPM_CTL(port),
>  			       PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE |
>  			       PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |
>  			       PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) |
> @@ -338,7 +338,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
>  				       intel_dp->alpm_parameters.silence_period_sym_clocks));
>  
>  		intel_de_write(display,
> -			       PORT_ALPM_LFPS_CTL(display, port),
> +			       PORT_ALPM_LFPS_CTL(port),
>  			       PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |
>  			       PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
>  				       intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) |
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 257526362b39..d66dbb529e1d 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2076,7 +2076,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
>  			     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
>  
>  		intel_de_rmw(dev_priv,
> -			     PORT_ALPM_CTL(dev_priv, cpu_transcoder),
> +			     PORT_ALPM_CTL(cpu_transcoder),
>  			     PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
>  	}
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 642bb15fb547..b4984e589d7e 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -295,7 +295,7 @@
>  
>  #define _PORT_ALPM_CTL_A			0x16fa2c
>  #define _PORT_ALPM_CTL_B			0x16fc2c
> -#define PORT_ALPM_CTL(dev_priv, port)		_MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B)
> +#define PORT_ALPM_CTL(port)			_MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B)
>  #define  PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE	REG_BIT(31)
>  #define  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK	REG_GENMASK(23, 20)
>  #define  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(val)	REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK, val)
> @@ -306,7 +306,7 @@
>  
>  #define _PORT_ALPM_LFPS_CTL_A					0x16fa30
>  #define _PORT_ALPM_LFPS_CTL_B					0x16fc30
> -#define PORT_ALPM_LFPS_CTL(dev_priv, port)			_MMIO_PORT(port, _PORT_ALPM_LFPS_CTL_A, _PORT_ALPM_LFPS_CTL_B)
> +#define PORT_ALPM_LFPS_CTL(port)				_MMIO_PORT(port, _PORT_ALPM_LFPS_CTL_A, _PORT_ALPM_LFPS_CTL_B)
>  #define  PORT_ALPM_LFPS_CTL_LFPS_START_POLARITY			REG_BIT(31)
>  #define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MASK		REG_GENMASK(27, 24)
>  #define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MIN		7
> -- 
> 2.45.2
>
Jani Nikula Sept. 5, 2024, 5:08 p.m. UTC | #2 
On Thu, 05 Sep 2024, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> On Sat, Aug 31, 2024 at 09:51:14PM +0800, He Lugang wrote:
>> The parameter dev_priv is actually not used in macro PORT_ALPM_CTL
>> and PORT_ALPM_LFPS_CTL,so remove it to simplify the code.
>
> It is magically used on our back... hence the build failures that CI got.
> Jani is doing a great clean-up work on the display code to get rid
> of this 'dev_priv' usages in favor of a better display code separation
> and using intel_display struct.

I actually think this should(tm) work. It's just that it needs a rebase.

BR,
Jani.

>
> But thanks for the patch and the interest to help.
>
>> 
>> Signed-off-by: He Lugang <helugang@uniontech.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_alpm.c     | 4 ++--
>>  drivers/gpu/drm/i915/display/intel_psr.c      | 2 +-
>>  drivers/gpu/drm/i915/display/intel_psr_regs.h | 4 ++--
>>  3 files changed, 5 insertions(+), 5 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
>> index 82ee778b2efe..7a93ba627aa6 100644
>> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
>> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
>> @@ -330,7 +330,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
>>  			ALPM_CTL_AUX_LESS_WAKE_TIME(intel_dp->alpm_parameters.aux_less_wake_lines);
>>  
>>  		intel_de_write(display,
>> -			       PORT_ALPM_CTL(display, port),
>> +			       PORT_ALPM_CTL(port),
>>  			       PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE |
>>  			       PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |
>>  			       PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) |
>> @@ -338,7 +338,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
>>  				       intel_dp->alpm_parameters.silence_period_sym_clocks));
>>  
>>  		intel_de_write(display,
>> -			       PORT_ALPM_LFPS_CTL(display, port),
>> +			       PORT_ALPM_LFPS_CTL(port),
>>  			       PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |
>>  			       PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
>>  				       intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) |
>> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
>> index 257526362b39..d66dbb529e1d 100644
>> --- a/drivers/gpu/drm/i915/display/intel_psr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
>> @@ -2076,7 +2076,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
>>  			     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
>>  
>>  		intel_de_rmw(dev_priv,
>> -			     PORT_ALPM_CTL(dev_priv, cpu_transcoder),
>> +			     PORT_ALPM_CTL(cpu_transcoder),
>>  			     PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
>>  	}
>>  
>> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
>> index 642bb15fb547..b4984e589d7e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
>> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
>> @@ -295,7 +295,7 @@
>>  
>>  #define _PORT_ALPM_CTL_A			0x16fa2c
>>  #define _PORT_ALPM_CTL_B			0x16fc2c
>> -#define PORT_ALPM_CTL(dev_priv, port)		_MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B)
>> +#define PORT_ALPM_CTL(port)			_MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B)
>>  #define  PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE	REG_BIT(31)
>>  #define  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK	REG_GENMASK(23, 20)
>>  #define  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(val)	REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK, val)
>> @@ -306,7 +306,7 @@
>>  
>>  #define _PORT_ALPM_LFPS_CTL_A					0x16fa30
>>  #define _PORT_ALPM_LFPS_CTL_B					0x16fc30
>> -#define PORT_ALPM_LFPS_CTL(dev_priv, port)			_MMIO_PORT(port, _PORT_ALPM_LFPS_CTL_A, _PORT_ALPM_LFPS_CTL_B)
>> +#define PORT_ALPM_LFPS_CTL(port)				_MMIO_PORT(port, _PORT_ALPM_LFPS_CTL_A, _PORT_ALPM_LFPS_CTL_B)
>>  #define  PORT_ALPM_LFPS_CTL_LFPS_START_POLARITY			REG_BIT(31)
>>  #define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MASK		REG_GENMASK(27, 24)
>>  #define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MIN		7
>> -- 
>> 2.45.2
>>
He Lugang Sept. 6, 2024, 6:06 a.m. UTC | #3 
在 2024/9/6 01:08, Jani Nikula 写道:
> On Thu, 05 Sep 2024, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
>> On Sat, Aug 31, 2024 at 09:51:14PM +0800, He Lugang wrote:
>>> The parameter dev_priv is actually not used in macro PORT_ALPM_CTL
>>> and PORT_ALPM_LFPS_CTL,so remove it to simplify the code.
>>
>> It is magically used on our back... hence the build failures that CI got.
>> Jani is doing a great clean-up work on the display code to get rid
>> of this 'dev_priv' usages in favor of a better display code separation
>> and using intel_display struct.
> 
> I actually think this should(tm) work. It's just that it needs a rebase.
> 
> BR,
> Jani.
> 
OK,thannks for your reply,I'll rebase it.
>>
>> But thanks for the patch and the interest to help.
>>
Very glad if that will be help!
>>>
>>> Signed-off-by: He Lugang <helugang@uniontech.com>
>>> ---
>>>   drivers/gpu/drm/i915/display/intel_alpm.c     | 4 ++--
>>>   drivers/gpu/drm/i915/display/intel_psr.c      | 2 +-
>>>   drivers/gpu/drm/i915/display/intel_psr_regs.h | 4 ++--
>>>   3 files changed, 5 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
>>> index 82ee778b2efe..7a93ba627aa6 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
>>> @@ -330,7 +330,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
>>>   			ALPM_CTL_AUX_LESS_WAKE_TIME(intel_dp->alpm_parameters.aux_less_wake_lines);
>>>   
>>>   		intel_de_write(display,
>>> -			       PORT_ALPM_CTL(display, port),
>>> +			       PORT_ALPM_CTL(port),
>>>   			       PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE |
>>>   			       PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |
>>>   			       PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) |
>>> @@ -338,7 +338,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
>>>   				       intel_dp->alpm_parameters.silence_period_sym_clocks));
>>>   
>>>   		intel_de_write(display,
>>> -			       PORT_ALPM_LFPS_CTL(display, port),
>>> +			       PORT_ALPM_LFPS_CTL(port),
>>>   			       PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |
>>>   			       PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
>>>   				       intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) |
>>> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
>>> index 257526362b39..d66dbb529e1d 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_psr.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
>>> @@ -2076,7 +2076,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
>>>   			     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
>>>   
>>>   		intel_de_rmw(dev_priv,
>>> -			     PORT_ALPM_CTL(dev_priv, cpu_transcoder),
>>> +			     PORT_ALPM_CTL(cpu_transcoder),
>>>   			     PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
>>>   	}
>>>   
>>> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
>>> index 642bb15fb547..b4984e589d7e 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
>>> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
>>> @@ -295,7 +295,7 @@
>>>   
>>>   #define _PORT_ALPM_CTL_A			0x16fa2c
>>>   #define _PORT_ALPM_CTL_B			0x16fc2c
>>> -#define PORT_ALPM_CTL(dev_priv, port)		_MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B)
>>> +#define PORT_ALPM_CTL(port)			_MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B)
>>>   #define  PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE	REG_BIT(31)
>>>   #define  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK	REG_GENMASK(23, 20)
>>>   #define  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(val)	REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK, val)
>>> @@ -306,7 +306,7 @@
>>>   
>>>   #define _PORT_ALPM_LFPS_CTL_A					0x16fa30
>>>   #define _PORT_ALPM_LFPS_CTL_B					0x16fc30
>>> -#define PORT_ALPM_LFPS_CTL(dev_priv, port)			_MMIO_PORT(port, _PORT_ALPM_LFPS_CTL_A, _PORT_ALPM_LFPS_CTL_B)
>>> +#define PORT_ALPM_LFPS_CTL(port)				_MMIO_PORT(port, _PORT_ALPM_LFPS_CTL_A, _PORT_ALPM_LFPS_CTL_B)
>>>   #define  PORT_ALPM_LFPS_CTL_LFPS_START_POLARITY			REG_BIT(31)
>>>   #define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MASK		REG_GENMASK(27, 24)
>>>   #define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MIN		7
>>> -- 
>>> 2.45.2
>>>
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 82ee778b2efe..7a93ba627aa6 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -330,7 +330,7 @@  static void lnl_alpm_configure(struct intel_dp *intel_dp,
 			ALPM_CTL_AUX_LESS_WAKE_TIME(intel_dp->alpm_parameters.aux_less_wake_lines);
 
 		intel_de_write(display,
-			       PORT_ALPM_CTL(display, port),
+			       PORT_ALPM_CTL(port),
 			       PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE |
 			       PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |
 			       PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) |
@@ -338,7 +338,7 @@  static void lnl_alpm_configure(struct intel_dp *intel_dp,
 				       intel_dp->alpm_parameters.silence_period_sym_clocks));
 
 		intel_de_write(display,
-			       PORT_ALPM_LFPS_CTL(display, port),
+			       PORT_ALPM_LFPS_CTL(port),
 			       PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |
 			       PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
 				       intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) |
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 257526362b39..d66dbb529e1d 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2076,7 +2076,7 @@  static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 			     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
 
 		intel_de_rmw(dev_priv,
-			     PORT_ALPM_CTL(dev_priv, cpu_transcoder),
+			     PORT_ALPM_CTL(cpu_transcoder),
 			     PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
 	}
 
diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
index 642bb15fb547..b4984e589d7e 100644
--- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
@@ -295,7 +295,7 @@ 
 
 #define _PORT_ALPM_CTL_A			0x16fa2c
 #define _PORT_ALPM_CTL_B			0x16fc2c
-#define PORT_ALPM_CTL(dev_priv, port)		_MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B)
+#define PORT_ALPM_CTL(port)			_MMIO_PORT(port, _PORT_ALPM_CTL_A, _PORT_ALPM_CTL_B)
 #define  PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE	REG_BIT(31)
 #define  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK	REG_GENMASK(23, 20)
 #define  PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(val)	REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK, val)
@@ -306,7 +306,7 @@ 
 
 #define _PORT_ALPM_LFPS_CTL_A					0x16fa30
 #define _PORT_ALPM_LFPS_CTL_B					0x16fc30
-#define PORT_ALPM_LFPS_CTL(dev_priv, port)			_MMIO_PORT(port, _PORT_ALPM_LFPS_CTL_A, _PORT_ALPM_LFPS_CTL_B)
+#define PORT_ALPM_LFPS_CTL(port)				_MMIO_PORT(port, _PORT_ALPM_LFPS_CTL_A, _PORT_ALPM_LFPS_CTL_B)
 #define  PORT_ALPM_LFPS_CTL_LFPS_START_POLARITY			REG_BIT(31)
 #define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MASK		REG_GENMASK(27, 24)
 #define  PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MIN		7