diff mbox

[RFC,1/21] Add VIA DRM driver

Message ID alpine.LFD.2.03.1306081742220.18671@infradead.org (mailing list archive)
State New, archived
Headers show

Commit Message

James Simmons June 8, 2013, 4:43 p.m. UTC
commit 1fcf23d361375645d586756d126b436796ba4fba
Author: James Simmons <jsimmons@infradead.org>
Date:   Sat Jun 8 09:31:57 2013 -0400

    via: New KMS ioctls and hardware to support.
    
    Add new VIA pci ids to support newer hardware. Cleanup userspace
    api structs to remove kernel types and add the new KMS ioctls we
    will be supporting.
    
    Signed-Off-by: James Simmons <jsimmons@infradead.org>

Comments

Dave Airlie June 12, 2013, 7:02 a.m. UTC | #1
> commit 1fcf23d361375645d586756d126b436796ba4fba
> Author: James Simmons <jsimmons@infradead.org>
> Date:   Sat Jun 8 09:31:57 2013 -0400
>
>     via: New KMS ioctls and hardware to support.
>
>     Add new VIA pci ids to support newer hardware. Cleanup userspace
>     api structs to remove kernel types and add the new KMS ioctls we
>     will be supporting.

why remove all the __u32? seems to just undo
1d7f83d5ad6c30b385ba549c1c3a287cc872b7ae

and definitely shouldn't be in this patch.

Also I don't think its really necessary to add all the pci ids there,
just put them in the driver.

>
>  #define DRM_IOCTL_VIA_ALLOCMEM   DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
>  #define DRM_IOCTL_VIA_FREEMEM    DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
> @@ -86,6 +89,7 @@
>  #define DRM_IOCTL_VIA_FB_INIT    DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
>  #define DRM_IOCTL_VIA_MAP_INIT   DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
>  #define DRM_IOCTL_VIA_DEC_FUTEX   DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
> +#define DRM_IOCTL_VIA_OLD_GEM_CREATE  DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_OLD_GEM_CREATE, struct drm_via_gem_create)
>  #define DRM_IOCTL_VIA_DMA_INIT   DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
>  #define DRM_IOCTL_VIA_CMDBUFFER          DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
>  #define DRM_IOCTL_VIA_FLUSH      DRM_IO(  DRM_COMMAND_BASE + DRM_VIA_FLUSH)
> @@ -96,6 +100,13 @@
>  #define DRM_IOCTL_VIA_DMA_BLIT    DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t)
>  #define DRM_IOCTL_VIA_BLIT_SYNC   DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
>
> +/* KMS ioctls */
> +#define DRM_IOCTL_VIA_GETPARAM    DRM_IOR(DRM_COMMAND_BASE + DRM_VIA_GETPARAM, struct drm_via_param)
> +#define DRM_IOCTL_VIA_SETPARAM    DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_SETPARAM, struct drm_via_param)
> +#define DRM_IOCTL_VIA_GEM_CREATE  DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_GEM_CREATE, struct drm_via_gem_create)
> +#define DRM_IOCTL_VIA_GEM_WAIT    DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_GEM_WAIT, struct drm_via_gem_wait)
> +#define DRM_IOCTL_VIA_GEM_STATE   DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_GEM_STATE, struct drm_via_gem_create)

why does gem_state take a gem_create struct? is it the same info it returns?

>  typedef struct drm_via_dmablit {
> -       __u32 num_lines;
> -       __u32 line_length;
> +       uint32_t num_lines;
> +       uint32_t line_length;
>
> -       __u32 fb_addr;
> -       __u32 fb_stride;
> +       uint32_t fb_addr;
> +       uint32_t fb_stride;
>
>         unsigned char *mem_addr;
> -       __u32 mem_stride;
> +       uint32_t  mem_stride;
>
> -       __u32 flags;
> +       int bounce_buffer;

^ totally wtf here? no explains.

>         int to_fb;
>
>         drm_via_blitsync_t sync;
>  } drm_via_dmablit_t;
>
> -struct via_file_private {
> -       struct list_head obj_list;
> +/* Ioctl to query kernel params:
> + */
> +#define VIA_PARAM_CHIPSET_ID           0
> +#define VIA_PARAM_REVISION_ID          1
> +
> +struct drm_via_param {
> +       uint64_t param;
> +       uint64_t value;
> +};
> +
> +struct drm_via_gem_create {
> +       /**
> +        * Requested size for the object.
> +        *
> +        * The (page-aligned) allocated size for the object will be returned.
> +        */
> +       uint64_t size;
> +
> +       /*
> +        * Place the memory at the proper byte alignment.
> +        */
> +       uint32_t alignment;
> +
> +       /**
> +        * Format of data i.e tile pitch, for linear it is zero
> +        */
> +       uint32_t pitch;
> +
> +       /**
> +        * Give hints where to allocate this object.
> +        */
> +       uint32_t domains;
> +
> +       /**
> +        * chmod values applied to a buffer.
> +        */
> +       uint32_t mode_t;
> +
> +       /**
> +        * Offset to start of memory region.
> +        */
> +       uint64_t offset;
> +
> +       /**
> +        * Returned handle need to mmap the buffer.
> +        */
> +       uint64_t map_handle;
> +
> +       /**
> +        * Returned handle for the object.
> +        *
> +        * Object handles are nonzero.
> +        */
> +       uint32_t handle;
> +
> +       /**
> +        * Padding for future expansion.
> +        */
> +       uint32_t pad1;
> +       uint64_t pad2;
> +       uint64_t pad3;
> +       uint64_t pad4;


Don't bother with padding here, if you need to create another ioctl,
create another ioctl.

This is just my initial interface pass, because mostly everything else
can be cleaned up in tree,
the ABI not so much.

Dave.
Dave.
James Simmons June 30, 2013, 8:03 p.m. UTC | #2
> > commit 1fcf23d361375645d586756d126b436796ba4fba
> > Author: James Simmons <jsimmons@infradead.org>
> > Date:   Sat Jun 8 09:31:57 2013 -0400
> >
> >     via: New KMS ioctls and hardware to support.
> >
> >     Add new VIA pci ids to support newer hardware. Cleanup userspace
> >     api structs to remove kernel types and add the new KMS ioctls we
> >     will be supporting.
> 
> why remove all the __u32? seems to just undo
> 1d7f83d5ad6c30b385ba549c1c3a287cc872b7ae
> 
> and definitely shouldn't be in this patch.

Attempting to sync my userland header in xorg with what is used in the 
kernel. Since we have BSD users I attempted to play nice. This weekend
I played with a new header format that should satisfy everyone.
 
> Also I don't think its really necessary to add all the pci ids there,
> just put them in the driver.

Would you be okay with the pci ids being in via_drm.h instead? I have to 
look but if I remember correctly some of those pci ids are for the north 
bridge bus which is used to detect how much VRAM we have.

> >
> >  #define DRM_IOCTL_VIA_ALLOCMEM   DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
> >  #define DRM_IOCTL_VIA_FREEMEM    DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
> > @@ -86,6 +89,7 @@
> >  #define DRM_IOCTL_VIA_FB_INIT    DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
> >  #define DRM_IOCTL_VIA_MAP_INIT   DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
> >  #define DRM_IOCTL_VIA_DEC_FUTEX   DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
> > +#define DRM_IOCTL_VIA_OLD_GEM_CREATE  DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_OLD_GEM_CREATE, struct drm_via_gem_create)
> >  #define DRM_IOCTL_VIA_DMA_INIT   DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
> >  #define DRM_IOCTL_VIA_CMDBUFFER          DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
> >  #define DRM_IOCTL_VIA_FLUSH      DRM_IO(  DRM_COMMAND_BASE + DRM_VIA_FLUSH)
> > @@ -96,6 +100,13 @@
> >  #define DRM_IOCTL_VIA_DMA_BLIT    DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t)
> >  #define DRM_IOCTL_VIA_BLIT_SYNC   DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
> >
> > +/* KMS ioctls */
> > +#define DRM_IOCTL_VIA_GETPARAM    DRM_IOR(DRM_COMMAND_BASE + DRM_VIA_GETPARAM, struct drm_via_param)
> > +#define DRM_IOCTL_VIA_SETPARAM    DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_SETPARAM, struct drm_via_param)
> > +#define DRM_IOCTL_VIA_GEM_CREATE  DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_GEM_CREATE, struct drm_via_gem_create)
> > +#define DRM_IOCTL_VIA_GEM_WAIT    DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_GEM_WAIT, struct drm_via_gem_wait)
> > +#define DRM_IOCTL_VIA_GEM_STATE   DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_GEM_STATE, struct drm_via_gem_create)
> 
> why does gem_state take a gem_create struct? is it the same info it returns?

Yes that same info is returned. Prehaps struct drm_via_gem_create is a 
poor name. Maybe struct drm_via_gem_object ?

> >  typedef struct drm_via_dmablit {
> > -       __u32 num_lines;
> > -       __u32 line_length;
> > +       uint32_t num_lines;
> > +       uint32_t line_length;
> >
> > -       __u32 fb_addr;
> > -       __u32 fb_stride;
> > +       uint32_t fb_addr;
> > +       uint32_t fb_stride;
> >
> >         unsigned char *mem_addr;
> > -       __u32 mem_stride;
> > +       uint32_t  mem_stride;
> >
> > -       __u32 flags;
> > +       int bounce_buffer;
> 
> ^ totally wtf here? no explains.

Leftovers from older work that doesn't exist anymore. My bad.
 
> >         int to_fb;
> >
> >         drm_via_blitsync_t sync;
> >  } drm_via_dmablit_t;
> >
> > -struct via_file_private {
> > -       struct list_head obj_list;
> > +/* Ioctl to query kernel params:
> > + */
> > +#define VIA_PARAM_CHIPSET_ID           0
> > +#define VIA_PARAM_REVISION_ID          1
> > +
> > +struct drm_via_param {
> > +       uint64_t param;
> > +       uint64_t value;
> > +};
> > +
> > +struct drm_via_gem_create {
> > +       /**
> > +        * Requested size for the object.
> > +        *
> > +        * The (page-aligned) allocated size for the object will be returned.
> > +        */
> > +       uint64_t size;
> > +
> > +       /*
> > +        * Place the memory at the proper byte alignment.
> > +        */
> > +       uint32_t alignment;
> > +
> > +       /**
> > +        * Format of data i.e tile pitch, for linear it is zero
> > +        */
> > +       uint32_t pitch;
> > +
> > +       /**
> > +        * Give hints where to allocate this object.
> > +        */
> > +       uint32_t domains;
> > +
> > +       /**
> > +        * chmod values applied to a buffer.
> > +        */
> > +       uint32_t mode_t;
> > +
> > +       /**
> > +        * Offset to start of memory region.
> > +        */
> > +       uint64_t offset;
> > +
> > +       /**
> > +        * Returned handle need to mmap the buffer.
> > +        */
> > +       uint64_t map_handle;
> > +
> > +       /**
> > +        * Returned handle for the object.
> > +        *
> > +        * Object handles are nonzero.
> > +        */
> > +       uint32_t handle;
> > +
> > +       /**
> > +        * Padding for future expansion.
> > +        */
> > +       uint32_t pad1;
> > +       uint64_t pad2;
> > +       uint64_t pad3;
> > +       uint64_t pad4;
> 
> 
> Don't bother with padding here, if you need to create another ioctl,
> create another ioctl.

Would you mind if I keep one pad field to make it 64 bit align?
 
> This is just my initial interface pass, because mostly everything else
> can be cleaned up in tree,
> the ABI not so much.
> 
> Dave.
> Dave.
> _______________________________________________
> Openchrome-devel mailing list
> Openchrome-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/openchrome-devel
>
diff mbox

Patch

diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index c129162..5a33334 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1370,8 +1370,11 @@ 
 #define PCI_DEVICE_ID_VIA_VT3324	0x0324
 #define PCI_DEVICE_ID_VIA_VT3336	0x0336
 #define PCI_DEVICE_ID_VIA_VT3351	0x0351
+#define PCI_DEVICE_ID_VIA_VT3353	0x0353
 #define PCI_DEVICE_ID_VIA_VT3364	0x0364
 #define PCI_DEVICE_ID_VIA_8371_0	0x0391
+#define PCI_DEVICE_ID_VIA_VT3409	0x0409
+#define PCI_DEVICE_ID_VIA_VT3410	0x0410
 #define PCI_DEVICE_ID_VIA_6415		0x0415
 #define PCI_DEVICE_ID_VIA_8501_0	0x0501
 #define PCI_DEVICE_ID_VIA_82C561	0x0561
@@ -1385,6 +1388,7 @@ 
 #define PCI_DEVICE_ID_VIA_8605_0	0x0605
 #define PCI_DEVICE_ID_VIA_82C686	0x0686
 #define PCI_DEVICE_ID_VIA_82C691_0	0x0691
+#define PCI_DEVICE_ID_VIA_VT1122	0x1122
 #define PCI_DEVICE_ID_VIA_82C576_1	0x1571
 #define PCI_DEVICE_ID_VIA_82C586_2	0x3038
 #define PCI_DEVICE_ID_VIA_82C586_3	0x3040
@@ -1399,16 +1403,20 @@ 
 #define PCI_DEVICE_ID_VIA_8653_0	0x3101
 #define PCI_DEVICE_ID_VIA_8622		0x3102
 #define PCI_DEVICE_ID_VIA_8235_USB_2	0x3104
+#define PCI_DEVICE_ID_VIA_K8M800	0x3108
 #define PCI_DEVICE_ID_VIA_8233C_0	0x3109
 #define PCI_DEVICE_ID_VIA_8361		0x3112
 #define PCI_DEVICE_ID_VIA_XM266		0x3116
+#define PCI_DEVICE_ID_VIA_PM800		0x3118
 #define PCI_DEVICE_ID_VIA_612X		0x3119
+#define PCI_DEVICE_ID_VIA_CLE266	0x3122
 #define PCI_DEVICE_ID_VIA_862X_0	0x3123
 #define PCI_DEVICE_ID_VIA_8753_0	0x3128
 #define PCI_DEVICE_ID_VIA_8233A		0x3147
 #define PCI_DEVICE_ID_VIA_8703_51_0	0x3148
 #define PCI_DEVICE_ID_VIA_8237_SATA	0x3149
 #define PCI_DEVICE_ID_VIA_XN266		0x3156
+#define PCI_DEVICE_ID_VIA_VT3157	0x3157
 #define PCI_DEVICE_ID_VIA_6410		0x3164
 #define PCI_DEVICE_ID_VIA_8754C_0	0x3168
 #define PCI_DEVICE_ID_VIA_8235		0x3177
@@ -1416,12 +1424,20 @@ 
 #define PCI_DEVICE_ID_VIA_8377_0	0x3189
 #define PCI_DEVICE_ID_VIA_8378_0	0x3205
 #define PCI_DEVICE_ID_VIA_8783_0	0x3208
+#define PCI_DEVICE_ID_VIA_CN750		0x3225
 #define PCI_DEVICE_ID_VIA_8237		0x3227
+#define PCI_DEVICE_ID_VIA_K8M890	0x3230
 #define PCI_DEVICE_ID_VIA_8251		0x3287
 #define PCI_DEVICE_ID_VIA_8261		0x3402
 #define PCI_DEVICE_ID_VIA_8237A		0x3337
+#define PCI_DEVICE_ID_VIA_VT3343	0x3343
+#define PCI_DEVICE_ID_VIA_CN700		0x3344
+#define PCI_DEVICE_ID_VIA_P4M900	0x3371
 #define PCI_DEVICE_ID_VIA_8237S		0x3372
+#define PCI_DEVICE_ID_VIA_VX875		0x5122
 #define PCI_DEVICE_ID_VIA_SATA_EIDE	0x5324
+#define PCI_DEVICE_ID_VIA_KM400		0x7205
+#define PCI_DEVICE_ID_VIA_VX900		0x7122
 #define PCI_DEVICE_ID_VIA_8231		0x8231
 #define PCI_DEVICE_ID_VIA_8231_4	0x8235
 #define PCI_DEVICE_ID_VIA_8365_1	0x8305
@@ -1429,7 +1445,7 @@ 
 #define PCI_DEVICE_ID_VIA_CX700_IDE	0x0581
 #define PCI_DEVICE_ID_VIA_VX800		0x8353
 #define PCI_DEVICE_ID_VIA_VX855		0x8409
-#define PCI_DEVICE_ID_VIA_VX900		0x8410
+#define PCI_DEVICE_ID_VIA_8410		0x8410
 #define PCI_DEVICE_ID_VIA_8371_1	0x8391
 #define PCI_DEVICE_ID_VIA_82C598_1	0x8598
 #define PCI_DEVICE_ID_VIA_838X_1	0xB188
diff --git a/include/uapi/drm/via_drm.h b/include/uapi/drm/via_drm.h
index 8b0533c..73ccb10 100644
--- a/include/uapi/drm/via_drm.h
+++ b/include/uapi/drm/via_drm.h
@@ -16,7 +16,7 @@ 
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * THE AUTHOR(S) OR COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
@@ -33,14 +33,10 @@ 
 #ifndef _VIA_DEFINES_
 #define _VIA_DEFINES_
 
-#ifndef __KERNEL__
-#include "via_drmclient.h"
-#endif
-
 #define VIA_NR_SAREA_CLIPRECTS		8
-#define VIA_NR_XVMC_PORTS               10
-#define VIA_NR_XVMC_LOCKS               5
-#define VIA_MAX_CACHELINE_SIZE          64
+#define VIA_NR_XVMC_PORTS		10
+#define VIA_NR_XVMC_LOCKS		5
+#define VIA_MAX_CACHELINE_SIZE		64
 #define XVMCLOCKPTR(saPriv,lockNo)					\
 	((volatile struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
 				      (VIA_MAX_CACHELINE_SIZE - 1)) &	\
@@ -64,21 +60,28 @@ 
 
 /* VIA specific ioctls */
 #define DRM_VIA_ALLOCMEM	0x00
-#define DRM_VIA_FREEMEM	        0x01
+#define DRM_VIA_FREEMEM		0x01
 #define DRM_VIA_AGP_INIT	0x02
-#define DRM_VIA_FB_INIT	        0x03
+#define DRM_VIA_FB_INIT		0x03
 #define DRM_VIA_MAP_INIT	0x04
-#define DRM_VIA_DEC_FUTEX       0x05
-#define NOT_USED
+#define DRM_VIA_DEC_FUTEX	0x05
+#define DRM_VIA_OLD_GEM_CREATE	0x06
 #define DRM_VIA_DMA_INIT	0x07
 #define DRM_VIA_CMDBUFFER	0x08
-#define DRM_VIA_FLUSH	        0x09
-#define DRM_VIA_PCICMD	        0x0a
+#define DRM_VIA_FLUSH		0x09
+#define DRM_VIA_PCICMD		0x0a
 #define DRM_VIA_CMDBUF_SIZE	0x0b
 #define NOT_USED
-#define DRM_VIA_WAIT_IRQ        0x0d
-#define DRM_VIA_DMA_BLIT        0x0e
-#define DRM_VIA_BLIT_SYNC       0x0f
+#define DRM_VIA_WAIT_IRQ	0x0d
+#define DRM_VIA_DMA_BLIT	0x0e
+#define DRM_VIA_BLIT_SYNC	0x0f
+
+/* KMS ioctls */
+#define DRM_VIA_GETPARAM	0x10
+#define DRM_VIA_SETPARAM	0x11
+#define DRM_VIA_GEM_CREATE	0x12
+#define DRM_VIA_GEM_WAIT	0x13
+#define DRM_VIA_GEM_STATE	0x14
 
 #define DRM_IOCTL_VIA_ALLOCMEM	  DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
 #define DRM_IOCTL_VIA_FREEMEM	  DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
@@ -86,6 +89,7 @@ 
 #define DRM_IOCTL_VIA_FB_INIT	  DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
 #define DRM_IOCTL_VIA_MAP_INIT	  DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
 #define DRM_IOCTL_VIA_DEC_FUTEX   DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
+#define DRM_IOCTL_VIA_OLD_GEM_CREATE  DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_OLD_GEM_CREATE, struct drm_via_gem_create)
 #define DRM_IOCTL_VIA_DMA_INIT	  DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
 #define DRM_IOCTL_VIA_CMDBUFFER	  DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
 #define DRM_IOCTL_VIA_FLUSH	  DRM_IO(  DRM_COMMAND_BASE + DRM_VIA_FLUSH)
@@ -96,6 +100,13 @@ 
 #define DRM_IOCTL_VIA_DMA_BLIT    DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t)
 #define DRM_IOCTL_VIA_BLIT_SYNC   DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
 
+/* KMS ioctls */
+#define DRM_IOCTL_VIA_GETPARAM    DRM_IOR(DRM_COMMAND_BASE + DRM_VIA_GETPARAM, struct drm_via_param)
+#define DRM_IOCTL_VIA_SETPARAM    DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_SETPARAM, struct drm_via_param)
+#define DRM_IOCTL_VIA_GEM_CREATE  DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_GEM_CREATE, struct drm_via_gem_create)
+#define DRM_IOCTL_VIA_GEM_WAIT    DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_GEM_WAIT, struct drm_via_gem_wait)
+#define DRM_IOCTL_VIA_GEM_STATE   DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_GEM_STATE, struct drm_via_gem_create)
+
 /* Indices into buf.Setup where various bits of state are mirrored per
  * context and per buffer.  These can be fired at the card as a unit,
  * or in a piecewise fashion as required.
@@ -109,6 +120,7 @@ 
 #define VIA_BACK    0x2
 #define VIA_DEPTH   0x4
 #define VIA_STENCIL 0x8
+
 #define VIA_MEM_VIDEO   0	/* matches drm constant */
 #define VIA_MEM_AGP     1	/* matches drm constant */
 #define VIA_MEM_SYSTEM  2
@@ -116,19 +128,19 @@ 
 #define VIA_MEM_UNKNOWN 4
 
 typedef struct {
-	__u32 offset;
-	__u32 size;
+	uint32_t offset;
+	uint32_t size;
 } drm_via_agp_t;
 
 typedef struct {
-	__u32 offset;
-	__u32 size;
+	uint32_t offset;
+	uint32_t size;
 } drm_via_fb_t;
 
 typedef struct {
-	__u32 context;
-	__u32 type;
-	__u32 size;
+	uint32_t context;
+	uint32_t type;
+	uint32_t size;
 	unsigned long index;
 	unsigned long offset;
 } drm_via_mem_t;
@@ -150,9 +162,9 @@  typedef struct _drm_via_futex {
 		VIA_FUTEX_WAIT = 0x00,
 		VIA_FUTEX_WAKE = 0X01
 	} func;
-	__u32 ms;
-	__u32 lock;
-	__u32 val;
+	uint32_t ms;
+	uint32_t lock;
+	uint32_t val;
 } drm_via_futex_t;
 
 typedef struct _drm_via_dma_init {
@@ -213,7 +225,7 @@  typedef struct _drm_via_cmdbuf_size {
 		VIA_CMDBUF_LAG = 0x02
 	} func;
 	int wait;
-	__u32 size;
+	uint32_t size;
 } drm_via_cmdbuf_size_t;
 
 typedef enum {
@@ -238,8 +250,8 @@  enum drm_via_irqs {
 struct drm_via_wait_irq_request {
 	unsigned irq;
 	via_irq_seq_type_t type;
-	__u32 sequence;
-	__u32 signal;
+	uint32_t sequence;
+	uint32_t signal;
 };
 
 typedef union drm_via_irqwait {
@@ -248,7 +260,7 @@  typedef union drm_via_irqwait {
 } drm_via_irqwait_t;
 
 typedef struct drm_via_blitsync {
-	__u32 sync_handle;
+	uint32_t sync_handle;
 	unsigned engine;
 } drm_via_blitsync_t;
 
@@ -259,23 +271,89 @@  typedef struct drm_via_blitsync {
  */
 
 typedef struct drm_via_dmablit {
-	__u32 num_lines;
-	__u32 line_length;
+	uint32_t num_lines;
+	uint32_t line_length;
 
-	__u32 fb_addr;
-	__u32 fb_stride;
+	uint32_t fb_addr;
+	uint32_t fb_stride;
 
 	unsigned char *mem_addr;
-	__u32 mem_stride;
+	uint32_t  mem_stride;
 
-	__u32 flags;
+	int bounce_buffer;
 	int to_fb;
 
 	drm_via_blitsync_t sync;
 } drm_via_dmablit_t;
 
-struct via_file_private {
-	struct list_head obj_list;
+/* Ioctl to query kernel params:
+ */
+#define VIA_PARAM_CHIPSET_ID		0
+#define VIA_PARAM_REVISION_ID		1
+
+struct drm_via_param {
+	uint64_t param;
+	uint64_t value;
+};
+
+struct drm_via_gem_create {
+	/**
+	 * Requested size for the object.
+	 *
+	 * The (page-aligned) allocated size for the object will be returned.
+	 */
+	uint64_t size;
+
+	/*
+	 * Place the memory at the proper byte alignment.
+	 */
+	uint32_t alignment;
+
+	/**
+	 * Format of data i.e tile pitch, for linear it is zero
+	 */
+	uint32_t pitch;
+
+	/**
+	 * Give hints where to allocate this object.
+	 */
+	uint32_t domains;
+
+	/**
+	 * chmod values applied to a buffer.
+	 */
+	uint32_t mode_t;
+
+	/**
+	 * Offset to start of memory region.
+	 */
+	uint64_t offset;
+
+	/**
+	 * Returned handle need to mmap the buffer.
+	 */
+	uint64_t map_handle;
+
+	/**
+	 * Returned handle for the object.
+	 *
+	 * Object handles are nonzero.
+	 */
+	uint32_t handle;
+
+	/**
+	 * Padding for future expansion.
+	 */
+	uint32_t pad1;
+	uint64_t pad2;
+	uint64_t pad3;
+	uint64_t pad4;
+};
+
+struct drm_via_gem_wait {
+	/* the buffer object handle */
+	uint32_t handle;
+	uint32_t no_wait;
 };
 
 #endif				/* _VIA_DRM_H_ */