diff mbox series

[2/5] drm/meson: Simplify usage of clk_rate_exclusive_get()

Message ID c39cc382fcceca0166440367307260c10de7200d.1702400947.git.u.kleine-koenig@pengutronix.de (mailing list archive)
State New, archived
Headers show
Series clk: Make clk_rate_exclusive_get() return void | expand

Commit Message

Uwe Kleine-König Dec. 12, 2023, 5:26 p.m. UTC 
clk_rate_exclusive_get() returns 0 unconditionally. So remove error
handling. This prepares making clk_rate_exclusive_get() return void.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
Hello,

btw, the driver fails to call clk_rate_exclusive_put() in the error
paths of dw_mipi_dsi_phy_init().

Best regards
Uwe

 drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
index a6bc1bdb3d0d..49571f1ed88a 100644
--- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
+++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
@@ -88,15 +88,9 @@  static int dw_mipi_dsi_phy_init(void *priv_data)
 	}
 
 	/* Make sure the rate of the bit clock is not modified by someone else */
-	ret = clk_rate_exclusive_get(mipi_dsi->bit_clk);
-	if (ret) {
-		dev_err(mipi_dsi->dev,
-			"Failed to set the exclusivity on the bit clock rate (ret %d)\n", ret);
-		return ret;
-	}
+	clk_rate_exclusive_get(mipi_dsi->bit_clk);
 
 	ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000);
-
 	if (ret) {
 		dev_err(mipi_dsi->dev, "Failed to set DSI Pixel clock rate %u (%d)\n",
 			mipi_dsi->mode->clock * 1000, ret);