From patchwork Mon Feb 24 09:06:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 11399921 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AEC5B14BC for ; Mon, 24 Feb 2020 09:39:51 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8CBF02082E for ; Mon, 24 Feb 2020 09:39:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=cerno.tech header.i=@cerno.tech header.b="OHc5s5PO"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="v7NYCHWE" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8CBF02082E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=cerno.tech Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D557B6E30D; Mon, 24 Feb 2020 09:39:25 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from wnew3-smtp.messagingengine.com (wnew3-smtp.messagingengine.com [64.147.123.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id A82056E20E for ; Mon, 24 Feb 2020 09:09:45 +0000 (UTC) Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailnew.west.internal (Postfix) with ESMTP id B4686642; Mon, 24 Feb 2020 04:09:44 -0500 (EST) Received: from mailfrontend1 ([10.202.2.162]) by compute3.internal (MEProxy); Mon, 24 Feb 2020 04:09:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cerno.tech; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm2; bh=rwIPW5Rarf5vi ZX1mLAZ2WDXchic4euofCpdg0WseoM=; b=OHc5s5PO0n/n5ZT6n+KJde2B40EMi fuk2VdePddrCfJ7SBpneKochjTr68MO1B4F9JmOfCd/2ssMdujXYslafGYXnfeGW RGN6ZWcSvYIs6UT8cslH/PjdRueWW0MOjalaD92cO+oviTPU3enjLFAPii5959kJ eL/Nb9g0CkVe3cf6R6/wQ+y3obqdwfr1wf4O0EccQl1fS8mGD0cgFetcJy/jYbMC JP9tgVGsKpfYpak/Tw/B/tbm+ApivPsxPwnJu1Qjr/kFCp/w/w6tBgWqeG5MhEKV ILI8DQVioS6RbccIh8vvhrVoc3OKDoLnOi7bZfrLQBt4nZ+nqC4AvfMMQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm2; bh=rwIPW5Rarf5viZX1mLAZ2WDXchic4euofCpdg0WseoM=; b=v7NYCHWE w7N9d7xpNsPjJKEV5rM7sJKt0kvvxKZUj3dk1mfUJzjKrmB6R9VLifNX+TjU9x3J F1eLyuOnYbLVi/qbMnrWamc8h8XeMHgQkKqugi9OuZG6t83Up66b5mpCwRZyLlab lKoPE1bKzB/djvYiGTLzKpoKiMg7FWuxtPUJcI6P0xEmlZOCIs9bgNUGRowiGz9e XmPEbApO4D4apaypjlakkyMmIl19PIZWIDRrmHqbs0Iayz/KP+RY3u5ADbxwyzcD A4UH+DlLvN+V7MlAgTMfzq8Jr5Bmmy699lY6kcU2BvHL6/XY2HGNFgcfRKgeYLgF aOvGNvpJ6Xwusg== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedugedrledtucetufdoteggodetrfdotffvucfrrh hofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgenuceurghi lhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurh ephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpeforgigihhmvgcutfhi phgrrhguuceomhgrgihimhgvsegtvghrnhhordhtvggthheqnecukfhppeeltddrkeelrd eikedrjeeinecuvehluhhsthgvrhfuihiivgepfedunecurfgrrhgrmhepmhgrihhlfhhr ohhmpehmrgigihhmvgestggvrhhnohdrthgvtghh X-ME-Proxy: Received: from localhost (lfbn-tou-1-1502-76.w90-89.abo.wanadoo.fr [90.89.68.76]) by mail.messagingengine.com (Postfix) with ESMTPA id F3BBD328005E; Mon, 24 Feb 2020 04:09:43 -0500 (EST) From: Maxime Ripard To: Nicolas Saenz Julienne , Eric Anholt Subject: [PATCH 38/89] drm/vc4: plane: Move planes creation to its own function Date: Mon, 24 Feb 2020 10:06:40 +0100 Message-Id: X-Mailer: git-send-email 2.24.1 In-Reply-To: References: MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 24 Feb 2020 09:39:03 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tim Gover , Dave Stevenson , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, Phil Elwell , linux-arm-kernel@lists.infradead.org, Maxime Ripard Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The planes so far were created as part of the CRTC binding code with each planes created associated only to one CRTC. However, the hardware in the vc4 doesn't really have such constraint and can be used with any CRTC. In order to rework this, let's first move the overlay and cursor planes creation to a function of its own. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_crtc.c | 33 +++--------------------------- drivers/gpu/drm/vc4/vc4_drv.h | 2 ++- drivers/gpu/drm/vc4/vc4_plane.c | 38 ++++++++++++++++++++++++++++++++++- 3 files changed, 44 insertions(+), 29 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index 381702b9f057..43cfc9ba18ba 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -1141,7 +1141,7 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data) struct drm_device *drm = dev_get_drvdata(master); struct vc4_crtc *vc4_crtc; struct drm_crtc *crtc; - struct drm_plane *primary_plane, *cursor_plane, *destroy_plane, *temp; + struct drm_plane *primary_plane, *destroy_plane, *temp; const struct of_device_id *match; int ret, i; @@ -1189,34 +1189,9 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data) */ drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size); - /* Set up some arbitrary number of planes. We're not limited - * by a set number of physical registers, just the space in - * the HVS (16k) and how small an plane can be (28 bytes). - * However, each plane we set up takes up some memory, and - * increases the cost of looping over planes, which atomic - * modesetting does quite a bit. As a result, we pick a - * modest number of planes to expose, that should hopefully - * still cover any sane usecase. - */ - for (i = 0; i < 8; i++) { - struct drm_plane *plane = - vc4_plane_init(drm, DRM_PLANE_TYPE_OVERLAY); - - if (IS_ERR(plane)) - continue; - - plane->possible_crtcs = drm_crtc_mask(crtc); - } - - /* Set up the legacy cursor after overlay initialization, - * since we overlay planes on the CRTC in the order they were - * initialized. - */ - cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR); - if (!IS_ERR(cursor_plane)) { - cursor_plane->possible_crtcs = drm_crtc_mask(crtc); - crtc->cursor = cursor_plane; - } + ret = vc4_plane_create_additional_planes(drm, crtc); + if (ret) + goto err_destroy_planes; vc4_crtc_get_cob_allocation(vc4_crtc); diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h index 63c05c764942..cc73c06e019d 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h @@ -848,6 +848,8 @@ int vc4_kms_load(struct drm_device *dev); /* vc4_plane.c */ struct drm_plane *vc4_plane_init(struct drm_device *dev, enum drm_plane_type type); +int vc4_plane_create_additional_planes(struct drm_device *dev, + struct drm_crtc *crtc); u32 vc4_plane_write_dlist(struct drm_plane *plane, u32 __iomem *dlist); u32 vc4_plane_dlist_size(const struct drm_plane_state *state); void vc4_plane_async_set_fb(struct drm_plane *plane, diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index 26e96b15e9b4..e4dab514efef 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -1371,3 +1371,41 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev, return plane; } + +int vc4_plane_create_additional_planes(struct drm_device *drm, + struct drm_crtc *crtc) +{ + struct drm_plane *cursor_plane; + unsigned int i; + + /* Set up some arbitrary number of planes. We're not limited + * by a set number of physical registers, just the space in + * the HVS (16k) and how small an plane can be (28 bytes). + * However, each plane we set up takes up some memory, and + * increases the cost of looping over planes, which atomic + * modesetting does quite a bit. As a result, we pick a + * modest number of planes to expose, that should hopefully + * still cover any sane usecase. + */ + for (i = 0; i < 8; i++) { + struct drm_plane *plane = + vc4_plane_init(drm, DRM_PLANE_TYPE_OVERLAY); + + if (IS_ERR(plane)) + continue; + + plane->possible_crtcs = drm_crtc_mask(crtc); + } + + /* Set up the legacy cursor after overlay initialization, + * since we overlay planes on the CRTC in the order they were + * initialized. + */ + cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR); + if (!IS_ERR(cursor_plane)) { + cursor_plane->possible_crtcs = drm_crtc_mask(crtc); + crtc->cursor = cursor_plane; + } + + return 0; +}