| Message ID | ecd686e9b2335275bfb1ccfe1878305367b34bf3.1599120059.git-series.maxime@cerno.tech (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/vc4: Support BCM2711 Display Pipeline | expand |
Hi Maxime, On 9/3/20 5:01 PM, Maxime Ripard wrote: > The HDMI controllers found in the BCM2711 SoC need some adjustments to the > bindings, especially since the registers have been shuffled around in more > register ranges. > > Reviewed-by: Rob Herring <robh@kernel.org> > Tested-by: Chanwoo Choi <cw00.choi@samsung.com> > Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> > Tested-by: Stefan Wahren <stefan.wahren@i2se.com> > Signed-off-by: Maxime Ripard <maxime@cerno.tech> Thanks for your v5 patch Reviewed-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Best regards, Hoegeun > --- > Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml | 117 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- > 1 file changed, 117 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml > > diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml b/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml > new file mode 100644 > index 000000000000..03a76729d26c > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml > @@ -0,0 +1,117 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: https://protect2.fireeye.com/v1/url?k=0b6f5f6c-56a4d852-0b6ed423-0cc47a31309a-d9c680091736128f&q=1&e=24b01bb3-08a1-4c21-9bf9-e1d1e9ffdc3e&u=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdisplay%2Fbrcm%2Cbcm2711-hdmi.yaml%23 > +$schema: https://protect2.fireeye.com/v1/url?k=a854ae90-f59f29ae-a85525df-0cc47a31309a-1160616098892a41&q=1&e=24b01bb3-08a1-4c21-9bf9-e1d1e9ffdc3e&u=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23 > + > +title: Broadcom BCM2711 HDMI Controller Device Tree Bindings > + > +maintainers: > + - Eric Anholt <eric@anholt.net> > + > +properties: > + compatible: > + enum: > + - brcm,bcm2711-hdmi0 > + - brcm,bcm2711-hdmi1 > + > + reg: > + items: > + - description: HDMI controller register range > + - description: DVP register range > + - description: HDMI PHY register range > + - description: Rate Manager register range > + - description: Packet RAM register range > + - description: Metadata RAM register range > + - description: CSC register range > + - description: CEC register range > + - description: HD register range > + > + reg-names: > + items: > + - const: hdmi > + - const: dvp > + - const: phy > + - const: rm > + - const: packet > + - const: metadata > + - const: csc > + - const: cec > + - const: hd > + > + clocks: > + items: > + - description: The HDMI state machine clock > + - description: The Pixel BVB clock > + - description: The HDMI Audio parent clock > + - description: The HDMI CEC parent clock > + > + clock-names: > + items: > + - const: hdmi > + - const: bvb > + - const: audio > + - const: cec > + > + ddc: > + allOf: > + - $ref: /schemas/types.yaml#/definitions/phandle > + description: > > + Phandle of the I2C controller used for DDC EDID probing > + > + hpd-gpios: > + description: > > + The GPIO pin for the HDMI hotplug detect (if it doesn't appear > + as an interrupt/status bit in the HDMI controller itself) > + > + dmas: > + maxItems: 1 > + description: > > + Should contain one entry pointing to the DMA channel used to > + transfer audio data. > + > + dma-names: > + const: audio-rx > + > + resets: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - resets > + - ddc > + > +additionalProperties: false > + > +examples: > + - | > + hdmi0: hdmi@7ef00700 { > + compatible = "brcm,bcm2711-hdmi0"; > + reg = <0x7ef00700 0x300>, > + <0x7ef00300 0x200>, > + <0x7ef00f00 0x80>, > + <0x7ef00f80 0x80>, > + <0x7ef01b00 0x200>, > + <0x7ef01f00 0x400>, > + <0x7ef00200 0x80>, > + <0x7ef04300 0x100>, > + <0x7ef20000 0x100>; > + reg-names = "hdmi", > + "dvp", > + "phy", > + "rm", > + "packet", > + "metadata", > + "csc", > + "cec", > + "hd"; > + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>; > + clock-names = "hdmi", "bvb", "audio", "cec"; > + resets = <&dvp 0>; > + ddc = <&ddc0>; > + }; > + > +...
diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml b/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml new file mode 100644 index 000000000000..03a76729d26c --- /dev/null +++ b/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml @@ -0,0 +1,117 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM2711 HDMI Controller Device Tree Bindings + +maintainers: + - Eric Anholt <eric@anholt.net> + +properties: + compatible: + enum: + - brcm,bcm2711-hdmi0 + - brcm,bcm2711-hdmi1 + + reg: + items: + - description: HDMI controller register range + - description: DVP register range + - description: HDMI PHY register range + - description: Rate Manager register range + - description: Packet RAM register range + - description: Metadata RAM register range + - description: CSC register range + - description: CEC register range + - description: HD register range + + reg-names: + items: + - const: hdmi + - const: dvp + - const: phy + - const: rm + - const: packet + - const: metadata + - const: csc + - const: cec + - const: hd + + clocks: + items: + - description: The HDMI state machine clock + - description: The Pixel BVB clock + - description: The HDMI Audio parent clock + - description: The HDMI CEC parent clock + + clock-names: + items: + - const: hdmi + - const: bvb + - const: audio + - const: cec + + ddc: + allOf: + - $ref: /schemas/types.yaml#/definitions/phandle + description: > + Phandle of the I2C controller used for DDC EDID probing + + hpd-gpios: + description: > + The GPIO pin for the HDMI hotplug detect (if it doesn't appear + as an interrupt/status bit in the HDMI controller itself) + + dmas: + maxItems: 1 + description: > + Should contain one entry pointing to the DMA channel used to + transfer audio data. + + dma-names: + const: audio-rx + + resets: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - clocks + - resets + - ddc + +additionalProperties: false + +examples: + - | + hdmi0: hdmi@7ef00700 { + compatible = "brcm,bcm2711-hdmi0"; + reg = <0x7ef00700 0x300>, + <0x7ef00300 0x200>, + <0x7ef00f00 0x80>, + <0x7ef00f80 0x80>, + <0x7ef01b00 0x200>, + <0x7ef01f00 0x400>, + <0x7ef00200 0x80>, + <0x7ef04300 0x100>, + <0x7ef20000 0x100>; + reg-names = "hdmi", + "dvp", + "phy", + "rm", + "packet", + "metadata", + "csc", + "cec", + "hd"; + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>; + clock-names = "hdmi", "bvb", "audio", "cec"; + resets = <&dvp 0>; + ddc = <&ddc0>; + }; + +...