@@ -76,11 +76,23 @@ struct intel_guc {
*/
atomic_t outstanding_submission_g2h;
- /** @interrupts: pointers to GuC interrupt-managing functions. */
+ /**
+ * @tlb_lookup: TLB cache invalidation lookup table.
+ */
struct xarray tlb_lookup;
+
+ /**
+ * @serial_slot: index to the latest allocated element at the
+ * @tlb_lookup xarray.
+ */
u32 serial_slot;
+
+ /**
+ * @next_seqno: next index to be allocated at the @tlb_lookup xarray.
+ */
u32 next_seqno;
+ /** @interrupts: pointers to GuC interrupt-managing functions. */
struct {
void (*reset)(struct intel_guc *guc);
void (*enable)(struct intel_guc *guc);
Add documentation for the 3 new members of struct intel_guc that are used to handle TLB cache invalidation logic. Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org> --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH v2 00/21] at: https://lore.kernel.org/all/cover.1657800199.git.mchehab@kernel.org/ drivers/gpu/drm/i915/gt/uc/intel_guc.h | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)