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Thu, 14 Mar 2024 13:17:31 +0000 From: "Peng Fan (OSS)" Date: Thu, 14 Mar 2024 21:25:10 +0800 Subject: [PATCH v4 1/6] dt-bindindgs: clock: nxp: support i.MX95 VPU CSR module Message-Id: <20240314-imx95-blk-ctl-v4-1-d23de23b6ff2@nxp.com> References: <20240314-imx95-blk-ctl-v4-0-d23de23b6ff2@nxp.com> In-Reply-To: <20240314-imx95-blk-ctl-v4-0-d23de23b6ff2@nxp.com> To: Abel Vesa , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: linux-clk@vger.kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peng Fan X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1710422742; l=2432; i=peng.fan@nxp.com; s=20230812; h=from:subject:message-id; bh=oBfgXvJOkUvZpqBqKyx61phq+NVdb4iyS6Nu0vXi1l8=; b=J9UCWV2mJZkpJq83v+YDYvK0Gn0se2D5+Nw0rwOnC1ogjD9MHOqQ5xuIujHBCIu/QFIEAeTLF 4KCxWT1fMlJA5Jz8Zx91gMIdrta/oMNWRVzymxPlQ/THyxMqZGHgM5M X-Developer-Key: i=peng.fan@nxp.com; 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This patch is to add clock features for VPU CSR. Signed-off-by: Peng Fan Reviewed-by: Rob Herring --- .../bindings/clock/nxp,imx95-vpu-csr.yaml | 50 ++++++++++++++++++++++ include/dt-bindings/clock/nxp,imx95-clock.h | 14 ++++++ 2 files changed, 64 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-vpu-csr.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-vpu-csr.yaml new file mode 100644 index 000000000000..4a1c6dcfe3f8 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-vpu-csr.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/nxp,imx95-vpu-csr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX95 VPUMIX Block Control + +maintainers: + - Peng Fan + +properties: + compatible: + items: + - const: nxp,imx95-vpu-csr + - const: syscon + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 1 + + '#clock-cells': + const: 1 + description: + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See + include/dt-bindings/clock/nxp,imx95-clock.h + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + syscon@4c410000 { + compatible = "nxp,imx95-vpu-csr", "syscon"; + reg = <0x4c410000 0x10000>; + #clock-cells = <1>; + clocks = <&scmi_clk 114>; + power-domains = <&scmi_devpd 21>; + }; +... diff --git a/include/dt-bindings/clock/nxp,imx95-clock.h b/include/dt-bindings/clock/nxp,imx95-clock.h new file mode 100644 index 000000000000..9d8f0a6d12d0 --- /dev/null +++ b/include/dt-bindings/clock/nxp,imx95-clock.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ +/* + * Copyright 2024 NXP + */ + +#ifndef __DT_BINDINGS_CLOCK_IMX95_H +#define __DT_BINDINGS_CLOCK_IMX95_H + +#define IMX95_CLK_VPUBLK_WAVE 0 +#define IMX95_CLK_VPUBLK_JPEG_ENC 1 +#define IMX95_CLK_VPUBLK_JPEG_DEC 2 +#define IMX95_CLK_VPUBLK_END 3 + +#endif /* __DT_BINDINGS_CLOCK_IMX95_H */