From patchwork Mon Mar 18 20:44:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 13595808 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2111.outbound.protection.outlook.com [40.107.21.111]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E8E05788C for ; Mon, 18 Mar 2024 20:45:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.21.111 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710794718; cv=fail; b=k3CMObkY4pIrZa95zjtC+pn+Fyy5pgpAm9ocrpxOwF3LaKPRmH/ZqTPuQIwk+x9xvAMYDGVW4TVkB3VJg4VmFdJ0XJFhOJ3l0e78/WH7KDH3GM7lygNoTXstoqJ/n1+duHCHDMqOMfWLuyqAqFq2Wt7Wn+BILcd6qr0UCZU5Vrc= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710794718; c=relaxed/simple; bh=pkEVvWOsGPC8GRmMAKNJcok9PfGzxBg+simpRDnERxE=; h=From:Date:Subject:Content-Type:Message-Id:References:In-Reply-To: To:Cc:MIME-Version; b=VhiomeZqCgk1RikemEUQbjYA0NdlUsuduKCqAK7N/KWLaQuRsQuNx0ylgaSrf4GEzTodHwrfHpGzFrFjXBdXTdaOryoMWBUhorQwtIMbnVbKgIQB9SkmlTHKKWS5Jcw6kaVTFcDqmYL7emci345Ig/gEfvQ+4pYsNsLWTxPKCfg= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; dkim=pass (1024-bit key) header.d=nxp.com header.i=@nxp.com header.b=WxKQ1cB/; arc=fail smtp.client-ip=40.107.21.111 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=nxp.com header.i=@nxp.com header.b="WxKQ1cB/" ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=c6fJV2pk91+js9nSZcT0wVsTxJEawcg/ggyxt3ozT1WEIemgLbJZ6FQu425YP694kFAWZBXE0cwYWc20hnLjGVpR9uiGGKC7FNXTjZ+fw64WAQY7EMT9S68eJQ2q45WmkmNe3qHJr9a2znWcrEUu+5/5DsTpVnj44mGPt9NaRxm8e316EA1f0GJmYLBzKGLqidW/i3/mUThiAQrjlhM8TeRshwzJldRKESi0U7+FpyhPqHMVKhEjePJIzpub/hQ3vsrRGjUTmgxq20fBvfzsZtoylUJFFKeVWaJrXMppArrdgSejxRdE4/slvSNiMVrhN413zWOYULoPxEqNKX1T1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=xKzF2nPeJMZc/TEzPO9lzXdhY8kN2NWlNrZ/LDL9oZI=; b=lcTipwbPORX+GjqiNbgPnF6js9Adc8Z77I5kHBttCqwfLgTCEN67QGfIEMyG5Wp7xpzrhMRwJEupSxrwAYpLBJ1HsyfrQz/QggpTfW45Eg17eQ7ryfoq51jE+Vq3/4esqxH09adkuneFFSbiioqGJA2WfwTHubzh/K1WCa6XTbg5LnGnfktkCAUT6b/Kk8SQrG/WdEy47BAMJKZbQj5GsMN8DZf62O4gv0lmEyQg6tlsX5GXclsrQsJsFgW1NJiOwiH4AO9hJh2sd93yEzR2tqdEoBRadlaVzkx50IxZHxceIgXeaP+Bd3TflTcghR1sSTSdppGOoKx5jk2VSj/ktA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=xKzF2nPeJMZc/TEzPO9lzXdhY8kN2NWlNrZ/LDL9oZI=; b=WxKQ1cB/n9KCJi955lwiqlvdooNc952OJGRkJyZ3zCeDG5foTZpgwle+yQgwWyUIIbeWvgUrEYrr9+nIDEtyxzv2qrtqRuB8A9crWkFlVecr53ETupuzYDVkyVUZRGMgIFjmKSqAEzUHUoyL+BjN+ztNh84tfkEHR683DUSs1RA= Received: from PAXPR04MB9642.eurprd04.prod.outlook.com (2603:10a6:102:240::14) by PAXPR04MB8489.eurprd04.prod.outlook.com (2603:10a6:102:1dd::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7386.26; Mon, 18 Mar 2024 20:45:13 +0000 Received: from PAXPR04MB9642.eurprd04.prod.outlook.com ([fe80::3168:91:27c6:edf6]) by PAXPR04MB9642.eurprd04.prod.outlook.com ([fe80::3168:91:27c6:edf6%3]) with mapi id 15.20.7386.025; Mon, 18 Mar 2024 20:45:13 +0000 From: Frank Li Date: Mon, 18 Mar 2024 16:44:34 -0400 Subject: [PATCH v3 1/5] dmaengine: imx-sdma: Support allocate memory from internal SRAM (iram) Message-Id: <20240318-sdma_upstream-v3-1-da37ddd44d49@nxp.com> References: <20240318-sdma_upstream-v3-0-da37ddd44d49@nxp.com> In-Reply-To: <20240318-sdma_upstream-v3-0-da37ddd44d49@nxp.com> To: Vinod Koul , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joy Zou Cc: dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, Frank Li , Nicolin Chen , Shengjiu Wang , Daniel Baluta X-Mailer: b4 0.13-dev-c87ef X-Developer-Signature: v=1; a=ed25519-sha256; t=1710794703; l=4382; i=Frank.Li@nxp.com; s=20240130; h=from:subject:message-id; bh=35WKrihwsy+0gjRgHH1219vF/6YHpbFAEnJbyCUA0F4=; b=JPP6OeI3EwXu/KPXP3csyUsmZs4FQNTnM7V9K7FaD+IU3Lfuww2lLtULPg+OXFkfw0Ro6bR/C TSAWxXMLPoIDsRxCwiua35DsxcjdZ1tdUAyKyvAR5obWjNEi4sne/8H X-Developer-Key: i=Frank.Li@nxp.com; a=ed25519; pk=I0L1sDUfPxpAkRvPKy7MdauTuSENRq+DnA+G4qcS94Q= X-ClientProxiedBy: SJ0P220CA0005.NAMP220.PROD.OUTLOOK.COM (2603:10b6:a03:41b::12) To PAXPR04MB9642.eurprd04.prod.outlook.com (2603:10a6:102:240::14) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB9642:EE_|PAXPR04MB8489:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 57knjcN3Hvv+wGq/xBDl158HRc/8JQawi0NvdK5Yr2DtDHWs3GtefVZI+VaX4GCmfB5nCIoki5UUy+Zb8uED4JFB/8QT66aGGIUjDacLa8m256VFy0IkWnTal/piLQUpyutVbWis9P01EIx3ABfb1lNLW2aNV0ftd6StFhGC8vJWWFgBvFnNew09vNMOjGQcm3EsnM2YdHd6HHbuxEwQo7FzDaPF/lvb0YNY7JzeIQY9f6agThRrXWkeZ6Jc8e3/B869HEDw6GKIFXbsJpYqsts714Tk2OjRBJDbbSAHaehIWWVrZSzvl5H6HHkuHC6WIuARATNRuAF1rewpU0DS43No2gohAwPFdLXEMkV5qjMc84Gw4u3zOBGnW7OXQ7fxioWfpaiP+JiEJiOnAm63Iisviq78uYgkT+LZ0SPJSNBsDk431T615hyl1jhmBMkazlDWUIYnM6LbkYwZXqr4cFFmK3MoRU7vwKexuJB5GpwCHMPJ2DhYUY1sj0vV8pNG81DI4+PtIPJEKS4zBjqZ/Lycus2uCne5EkPkVS0VCCLSlwuEivfduaiRKrOCklK6QGT8BMomlzMud3IFiaB5MIgUaaA1dBk76tl/EZ3RG5m7rurkefZGX7aqSsMUrNFFpa0crshVmJxvU1SUW8s4npgjwZkBwGqw9jkvkQEG73BxUoK3Zuj1BaNHmilGPJ7yz+imfWksv5DYgC3YmkVgeFkzUFL+tQ/jZRAvwY6FXvk= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PAXPR04MB9642.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230031)(376005)(366007)(7416005)(52116005)(1800799015)(38350700005)(921011);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?yfrOBI5LZcFm5PoYQvnOiSZp7voR?= =?utf-8?q?bMmnTiWSsbbpBKHSv24Q92qnkid/QPd+CjaGP6U60tw8fX47a5DQsblhLNCZBBnZ6?= =?utf-8?q?AV4wPHxo60jJNCnTbOkW0cJ6FHc4GfJBPnUBCbyBo7SLf0yNT9IXs4lTMngeygbiq?= =?utf-8?q?M2VvYboMSh4OShZ9dlfExBs8OhvwTIlRRO1q3Yf79N2VJqr1ZPUzSJcjKVELiAfO7?= =?utf-8?q?nANdIml9AimqK27S9LYOjPJp9a64ictOcrNI9Jeoivtlt/aj7+b0JmO0HxqWvdxvs?= =?utf-8?q?YgwyMYzi4vxOy9gwYV64QBbdypedQmpf084iSStRyfTuXGwEDefGh05Q8ULebKg6Y?= =?utf-8?q?qtQ4DYmTfIjnCeiFmpcrHNOWw/nu2STFlo7dmNvNsoXfrgpR76iELN9RFoiZG0jTl?= =?utf-8?q?f4shxD/11i42xUZpseobzbXkWVkbeWEfenf0g5HubxbdbUC5AnNrxz7zFJOnewWZW?= =?utf-8?q?XMcWG73a/UOzcpg4h/TJ7wbYZTvU18WJB83vsV3sXuRR5dr99r4WOn3jS5Jr24CVc?= =?utf-8?q?RescdKDzem+cTne/Gf2IHHzO32YMY5qsWkp/SYBs1tUbw0fp2oNOjAOS/c1dnvR9H?= =?utf-8?q?+1+90etbzLys4qcPWfI3Bg4w1krwT2XnQo9JERlsTqvSazLkICcdb2roeQeAHrbDs?= =?utf-8?q?uHcjeN8Eb378yJfl5tDfy5vp8fSfx8NY5vGq/MJplvAYA2qURKy9o4NHjqbfSpNVh?= =?utf-8?q?4kiDJ0ZZgsJFWqbH/zAWtX91Pdy8l1rPs3HLuY7kHsxH76zR3ZGL/p5QQ6sRvP1pb?= =?utf-8?q?dgauPH2SfihMno5xXm8kce6nnANMOjPBAc9U6GDXg1fCl7Lsihn8KXTV6GGUIAzes?= =?utf-8?q?P33MxRGbw9/nOd9bEnDxRgvwahYlOqaM9+zImjNMP24uowXs2r1jQcsVSKRuBJQOY?= =?utf-8?q?594PoQocsRtpkkUyS8uSjRXvbIo9S9vkvbI7xIJi1CXQC+CyNat3lwI1qEQq6Du7U?= =?utf-8?q?0DuuakDiPAx0mxEbiHQXjA9ixzoWdVcn6oWYaQo974yAY+QeMWvmpT98DWQS8CwF+?= =?utf-8?q?XOS0pva26aStq04ao0r+RaO2MZJTyTUvcps8yOKL36dq/TA8Kxv8K5ha5MVesuPtG?= =?utf-8?q?iyfoRlo/p9OBh8Pdjk+lyegVuFHqyLOWImc8lB7/096ER6fjuytvG9dvzoH36D08C?= =?utf-8?q?jUFQyLTene+jx0PyF8D6Rz+Ktd9lxhYJwS361fzIjM836JKaouaZNFEdxvWJX5tDW?= =?utf-8?q?VewwxT0ICtqTdPc/uECkm6+TBXaMCGKjzHInPHW2vTgXKW+vJAovDBsdddGlnHjIJ?= =?utf-8?q?NQAXRQEAD5FN8ZVORfzJMQNBwINouKwfBOLKdrBUvHMER5q7DXpzLOiu3yhHX2QKT?= =?utf-8?q?xgZ5wQTV+ELNVYCXg2rv9d+X+KL6Czk5B5HDhYdL9jYecMcSp77YIj5rTbcI/c0IL?= =?utf-8?q?q27tsI8x4ZQzIfOo65apiQJ32n2a8UNLblAFe1u5dMFAhKdCzHpSkS8mNNzHSnc8d?= =?utf-8?q?5AVBYKZzHA4QwJwCPK4lI16cWcCJIq1T9hVcLHpnNJ+w8SLC2ZIZDOWzXfym3MkyZ?= =?utf-8?q?bRPT+kesy5f+?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f11e3bbe-358f-4d00-1acc-08dc478c4f48 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Mar 2024 20:45:13.2929 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: iwPNfbHV0EHJH2cEbPHQNiRpg6NK8yHCg96rnZ/pg+4jLsJyh27HB0UHbxk0BH1So+3C0kBAE0D/NP/rc/A6xg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR04MB8489 From: Nicolin Chen Allocate memory from SoC internal SRAM to reduce DDR access and keep DDR in lower power state (such as self-referesh) longer. Check iram_pool before sdma_init() so that ccb/context could be allocated from iram because DDR maybe in self-referesh in lower power audio case while sdma still running. Reviewed-by: Shengjiu Wang Signed-off-by: Nicolin Chen Signed-off-by: Joy Zou Reviewed-by: Daniel Baluta Signed-off-by: Frank Li --- drivers/dma/imx-sdma.c | 46 ++++++++++++++++++++++++++++++++++++---------- 1 file changed, 36 insertions(+), 10 deletions(-) diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index 9b42f5e96b1e0..4f1a9d1b152d6 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -531,6 +532,7 @@ struct sdma_engine { /* clock ratio for AHB:SDMA core. 1:1 is 1, 2:1 is 0*/ bool clk_ratio; bool fw_loaded; + struct gen_pool *iram_pool; }; static int sdma_config_write(struct dma_chan *chan, @@ -1358,8 +1360,14 @@ static int sdma_request_channel0(struct sdma_engine *sdma) { int ret = -EBUSY; - sdma->bd0 = dma_alloc_coherent(sdma->dev, PAGE_SIZE, &sdma->bd0_phys, - GFP_NOWAIT); + if (sdma->iram_pool) + sdma->bd0 = gen_pool_dma_alloc(sdma->iram_pool, + sizeof(struct sdma_buffer_descriptor), + &sdma->bd0_phys); + else + sdma->bd0 = dma_alloc_coherent(sdma->dev, + sizeof(struct sdma_buffer_descriptor), + &sdma->bd0_phys, GFP_NOWAIT); if (!sdma->bd0) { ret = -ENOMEM; goto out; @@ -1379,10 +1387,14 @@ static int sdma_request_channel0(struct sdma_engine *sdma) static int sdma_alloc_bd(struct sdma_desc *desc) { u32 bd_size = desc->num_bd * sizeof(struct sdma_buffer_descriptor); + struct sdma_engine *sdma = desc->sdmac->sdma; int ret = 0; - desc->bd = dma_alloc_coherent(desc->sdmac->sdma->dev, bd_size, - &desc->bd_phys, GFP_NOWAIT); + if (sdma->iram_pool) + desc->bd = gen_pool_dma_alloc(sdma->iram_pool, bd_size, &desc->bd_phys); + else + desc->bd = dma_alloc_coherent(sdma->dev, bd_size, &desc->bd_phys, GFP_NOWAIT); + if (!desc->bd) { ret = -ENOMEM; goto out; @@ -1394,9 +1406,12 @@ static int sdma_alloc_bd(struct sdma_desc *desc) static void sdma_free_bd(struct sdma_desc *desc) { u32 bd_size = desc->num_bd * sizeof(struct sdma_buffer_descriptor); + struct sdma_engine *sdma = desc->sdmac->sdma; - dma_free_coherent(desc->sdmac->sdma->dev, bd_size, desc->bd, - desc->bd_phys); + if (sdma->iram_pool) + gen_pool_free(sdma->iram_pool, (unsigned long)desc->bd, bd_size); + else + dma_free_coherent(desc->sdmac->sdma->dev, bd_size, desc->bd, desc->bd_phys); } static void sdma_desc_free(struct virt_dma_desc *vd) @@ -2068,6 +2083,7 @@ static int sdma_init(struct sdma_engine *sdma) { int i, ret; dma_addr_t ccb_phys; + int ccbsize; ret = clk_enable(sdma->clk_ipg); if (ret) @@ -2083,10 +2099,14 @@ static int sdma_init(struct sdma_engine *sdma) /* Be sure SDMA has not started yet */ writel_relaxed(0, sdma->regs + SDMA_H_C0PTR); - sdma->channel_control = dma_alloc_coherent(sdma->dev, - MAX_DMA_CHANNELS * sizeof(struct sdma_channel_control) + - sizeof(struct sdma_context_data), - &ccb_phys, GFP_KERNEL); + ccbsize = MAX_DMA_CHANNELS * (sizeof(struct sdma_channel_control) + + sizeof(struct sdma_context_data)); + + if (sdma->iram_pool) + sdma->channel_control = gen_pool_dma_alloc(sdma->iram_pool, ccbsize, &ccb_phys); + else + sdma->channel_control = dma_alloc_coherent(sdma->dev, ccbsize, &ccb_phys, + GFP_KERNEL); if (!sdma->channel_control) { ret = -ENOMEM; @@ -2272,6 +2292,12 @@ static int sdma_probe(struct platform_device *pdev) vchan_init(&sdmac->vc, &sdma->dma_device); } + if (np) { + sdma->iram_pool = of_gen_pool_get(np, "iram", 0); + if (sdma->iram_pool) + dev_info(&pdev->dev, "alloc bd from iram.\n"); + } + ret = sdma_init(sdma); if (ret) goto err_init;