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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?viFx8e4MNZ2CymG13uyPxQyLIL2y?= =?utf-8?q?+vAqPzauexnM8i3eE8mK2Pz+qYeirSK19T75NbVpxzh/GkP6K8Msu/Ir4x5//O+2f?= =?utf-8?q?AN3YQpIfzURRHwt9Z8eDTr2nJ7xoN0gBsh6Xrn6S/IFc6VFokmlOzkUnKFGlEys7B?= =?utf-8?q?1nZ9twEHjQAfHIUMKYxzR2Q8k0rfdSy51tAILovoYJ0Z3xvGyWkhUFuppHKMh6om5?= =?utf-8?q?oe4MG8bwOmgCAQSveBBmNOcTwlMZO35ny4ZvijDnXlFvDt1jRh5FdpCHM4QDgtNlj?= =?utf-8?q?uub5Vt7PqDplIDjDPn6bLnX/m7pjGj+zkRQDC9NMXEiRfe1vYWTqGaf/PK8jUKrJp?= =?utf-8?q?w1OlURRJLvK2eqgOCbTPWp4JWyViIRyFKwINljNrqz/u5gkmYQ4UBRxzE3xtvXqot?= =?utf-8?q?5q4guX+YvzOfkYfJIXau+kPkYACHD/gXO0sg51gcdRTZJpT2EZKXg6PyKuOoBWdCi?= =?utf-8?q?KQz6aJofESl3AovlD4pdnnSjYTL46Xpc6m5cmlsUJgGKResqWQ8lM6jrAUevDkA/F?= =?utf-8?q?F5gkCMi9UKexr4oMecnvwY61sjjhWTUNMxDXKy5sfzLProZXzv+z9IXPSFZoAhyKA?= =?utf-8?q?J7r6e2ST3PMaJb5ZqF8W02iNWN51nJXjlB1sGQLnP91BMTu9G3zusRlGdNSCCnzNf?= =?utf-8?q?v/GITaIS4Tw9bt7jEjubqYLZw2AB9TeigLxsEAasZipEqokwfz45ckuTe78+De/qZ?= =?utf-8?q?buz0lDv/Luj8SZeNyWAG7jgWYOASZZ0+65W10ZThlWgMiha7BVWWbmtnwMc7nnSww?= =?utf-8?q?Fh2BzfRMEHUGjUNyRjCwjhtvHKNVkkdqsgucX0KBozELbXwktNHgBeu4fKlyn5WNn?= =?utf-8?q?kWiHEA54mUo9NOBfdCuhD5pUlhGwP6j6Hju6acF3tuqmHxl3/5ysfs9Tv4P7hi5Xe?= =?utf-8?q?QytYOezwcxaLDYnlbIKUBxJTSVX61v8n3qvrTyVNftAzvc77HP4JeAe8zPjhVaEo3?= =?utf-8?q?3RoCIR+1+bhpSKz6F6sJ1rXKoaLx2JKt2arCFvdiR7zbKrWa7ORNcCJBWd+y887Z3?= =?utf-8?q?/Vn/bVCGx+tyMX0NaW4imEwFNuQtvOvBIjDDmXxLnufuJR7hqjo/ReqQDYlciXOWE?= =?utf-8?q?NrrMk6f7MKcGOVexcepJubMvOmk2NU5Xx8V6xqzM1EcalObCGR53Pa4oTKjIAU/Fo?= =?utf-8?q?grrgpF8vpYlSysm7W3f6IB902cXm/5vdYJuPU2u801grFkl9b8djDUuFCsdCQWHus?= =?utf-8?q?yxsmuCa+QweSWLApWeWx7jugiH5tupBXTEmrEXG6zkaA4AGH87waAEKFK72WXnG7a?= =?utf-8?q?DW5nmAlVU+BQkRE7gecuOFk8in/eLNkw1nIqQZqwouzOYLg9vMOnE1dyQAig6xE6n?= =?utf-8?q?nnd+ciPnLzzx3ZiqU7STknyxZpf0V0my/9L6xudId+yjWkgPsQ21UbcqdhXC/7Ukr?= =?utf-8?q?S7yH2PdiHUqUq8lsc0ikHmaLDfdcRKJoqc+wMLc4gO3ZT9BtdhP8qFMYnP5xygMsl?= =?utf-8?q?ZnDLThsBumCTQ3ou/r4q9e+xzNlIQqrh9Xjc9+4yAwbDXXhcLDYPYZYiuj0sMa6yl?= =?utf-8?q?ACr2iXDjoZxK?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8465c673-5a75-43ce-9f7b-08dc482eae38 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Mar 2024 16:07:30.9328 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: QfiJWMtI13vPRDWkicPnaX7X0/Ezge53fKv9ncmr/05+9ADw3TsHe6Y4oSzbcb4njjcCofYEaPUNkcE7nUOMLQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR04MB7772 From: Yoshihiro Shimoda Add "code" and "routing" into struct dw_pcie_ob_atu_cfg for triggering INTx IRQs by iATU in the PCIe endpoint mode in near the future. PCIE_ATU_INHIBIT_PAYLOAD is set to issue TLP type of Msg instead of MsgD. So, this implementation supports the data-less messages only for now. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Serge Semin Reviewed-by: Manivannan Sadhasivam Signed-off-by: Frank Li --- drivers/pci/controller/dwc/pcie-designware.c | 9 +++++++-- drivers/pci/controller/dwc/pcie-designware.h | 4 ++++ 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index df2575ec5f44c..ba909fade9db1 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -499,7 +499,7 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_TARGET, upper_32_bits(atu->pci_addr)); - val = atu->type | PCIE_ATU_FUNC_NUM(atu->func_no); + val = atu->type | atu->routing | PCIE_ATU_FUNC_NUM(atu->func_no); if (upper_32_bits(limit_addr) > upper_32_bits(cpu_addr) && dw_pcie_ver_is_ge(pci, 460A)) val |= PCIE_ATU_INCREASE_REGION_SIZE; @@ -507,7 +507,12 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci, val = dw_pcie_enable_ecrc(val); dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL1, val); - dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, PCIE_ATU_ENABLE); + val = PCIE_ATU_ENABLE; + if (atu->type == PCIE_ATU_TYPE_MSG) { + /* The data-less messages only for now */ + val |= PCIE_ATU_INHIBIT_PAYLOAD | atu->code; + } + dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, val); /* * Make sure ATU enable takes effect before any subsequent config diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index d21db82e586d5..703b50bc5e0f1 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -148,11 +148,13 @@ #define PCIE_ATU_TYPE_IO 0x2 #define PCIE_ATU_TYPE_CFG0 0x4 #define PCIE_ATU_TYPE_CFG1 0x5 +#define PCIE_ATU_TYPE_MSG 0x10 #define PCIE_ATU_TD BIT(8) #define PCIE_ATU_FUNC_NUM(pf) ((pf) << 20) #define PCIE_ATU_REGION_CTRL2 0x004 #define PCIE_ATU_ENABLE BIT(31) #define PCIE_ATU_BAR_MODE_ENABLE BIT(30) +#define PCIE_ATU_INHIBIT_PAYLOAD BIT(22) #define PCIE_ATU_FUNC_NUM_MATCH_EN BIT(19) #define PCIE_ATU_LOWER_BASE 0x008 #define PCIE_ATU_UPPER_BASE 0x00C @@ -303,6 +305,8 @@ struct dw_pcie_ob_atu_cfg { int index; int type; u8 func_no; + u8 code; + u8 routing; u64 cpu_addr; u64 pci_addr; u64 size;