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b=i1TeOHaNhs132SYivWtQtOtU+K1wyoLDwyH9FsLisJshV4LusOzsak1jH5fPeJcX5N0aFcH+euyj6sF+d94Pwd0Erix7sHVA+TWFz91j6AGXiKTOeb2RAz8WVdR3jkxrpPa/TZJE7nKWJzhMS9muN4RbhgJXyj2VB5DdMyGUHfs= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from DU2PR04MB8822.eurprd04.prod.outlook.com (2603:10a6:10:2e1::11) by DB9PR04MB9233.eurprd04.prod.outlook.com (2603:10a6:10:361::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7409.46; Mon, 15 Apr 2024 02:03:27 +0000 Received: from DU2PR04MB8822.eurprd04.prod.outlook.com ([fe80::8d2f:ac7e:966a:2f5f]) by DU2PR04MB8822.eurprd04.prod.outlook.com ([fe80::8d2f:ac7e:966a:2f5f%6]) with mapi id 15.20.7452.046; Mon, 15 Apr 2024 02:03:27 +0000 From: Xu Yang To: frank.li@nxp.com, will@kernel.org, mark.rutland@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, john.g.garry@oracle.com, jolsa@kernel.org, namhyung@kernel.org, irogers@google.com Cc: mike.leach@linaro.org, peterz@infradead.org, mingo@redhat.com, acme@kernel.org, alexander.shishkin@linux.intel.com, adrian.hunter@intel.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, imx@lists.linux.dev Subject: [PATCH v9 2/8] perf: imx_perf: add macro definitions for parsing config attr Date: Mon, 15 Apr 2024 10:03:47 +0800 Message-Id: <20240415020353.3833367-2-xu.yang_2@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240415020353.3833367-1-xu.yang_2@nxp.com> References: <20240415020353.3833367-1-xu.yang_2@nxp.com> X-ClientProxiedBy: SI2PR02CA0026.apcprd02.prod.outlook.com (2603:1096:4:195::19) To DU2PR04MB8822.eurprd04.prod.outlook.com (2603:10a6:10:2e1::11) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PR04MB8822:EE_|DB9PR04MB9233:EE_ X-MS-Office365-Filtering-Correlation-Id: 570624e1-a3de-410d-1e22-08dc5cf03d51 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Jn3rVldFyrWBMeNOTDnLCnelrAm8gtsa5ig9b5JcjdgZyOk4cv5eRMkhre1apIPSgOcBSvD/8HXBZ2LhGqSL49uO5he2Lc3GkkLbmyN0EoJd4LQo2+rpDguVuW6PR2oFBEKA+7mowSCSVK3YRc0kCipmBgt0qTd27ChjpLQNthLqseQdVU7gJNC5Vtdyw3el6AItcucyVPsiKaAiG5AMM6i3PzomsuLmOzAK364JyMPQ/hX6+9CHXY04hprCkSzAiI8Ye0+Pk5VvZEWWrsY68mxJe0c8mhJSzSAc31hyymUgoF4vUqSdgCU0zj5SGeXSslG7SXxnt6IiT5wz0LNAS9YU8BTFp277gQRAd2gxGxLroegRj40h34WNGzPS6nnIf5Tas9V79O/jjgDTiMGheeZEp/EvluH1PgaXRn9DnzMqhZQxsM8WJJXmJ9ENzgkEluAjLA8TYYD1jE/w2QxY3tLPVjPAJXfPM5RTGFf1xntWy4drzCLBUa+2MatpV2JGt/S/alNOqo5kqwnpfBWTa7weD2f+7qyceszfC/NjT3M4pdb6M1gaICOOuCBT2Bdyz4j+vTVp4Ful3Ma0b14eqmO5Lmd5KlcjuxSkMVkqZXn1r9hB3MOV71i8V7V1E63h9YS3riL9MhyKPDj0gbN13HpYSpHF8d0xulnoQdKdRqa/EWlltHph4BXYLUe8HxneEga9vEDSRoKr+SwZcTGi6rnlcbEl5gFdNZ9U1P+rwcmly8mozui2T0aTn8EAEq90wPb1NccdgOt2yBWwZjr2+ujDNEBnLZluwzVfVx26SmvlMs3Cv6GfkEjZ+adinuDcv+hMIRd7JiXiqJpZ/RZ2bCVPvvINVY2FRCE3r4db+65kH0dSjFZqEv8it2+7JV/TOE+7g5RTfQG634bc7ZaVxHlZvd8QRXSHtmYeR7GJY+Iw4Vr9Ul5XR9Jn5HG4THlDLKWkDbFMbbAWuoHge9Qx2nW2nJT8Qk3EXLgThHUiOD7U4yZQcMq8WDW5OzyXVyk/ZYoncMx5p/Apig08icQFcU9YlQ1R4y9H+u6dlKRMLQfepiwMRQk5Hz9ipDFs8Ejvipl1rqbpBo6trGebCfQxKNJHpU5SS48rQbU363vWSV/GIm4eMypHu/qR/D2cpXya+0gH3OgZtBgVZOlIH0Qq6gKGJj/tuSzn4wQroqIAkxcGdnW4UCNuRgppNow9Hc8H1DskecToSP53rqXhmqG0iTGQKsWDrcIv17JNppPBAbmvmbBBpPgI2OMwxXTSEW/fm3P/kJcBkASFzNpUcXC2oeVRY8PWKClSmFzAzasYkLxrYrhhYmQVwHyXrUWhLMYIsqjk9FwnskJOuDdVyS9oyIxd2umv9sHGnCqZAChuiQv39ODXH3HM5+ckTGFIWPLRPVGS6KBoc3aWo0pQ9ZnNVvM5Lqy9pdDfEjxgeSobvskCNRbSB8s9mGWRbNPhzRB5fFF59GJO7G/+vo/qQWzIJpmpqHozbRv3iNxo4P0i2WmNKzmok+69Tiz2NghEPXCuTr6BUIoi6czOQfkdJY+a5MR/joW06fPa+ITZ3c5gi1rsYnhZTggaMY7xXNybZeRi X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 570624e1-a3de-410d-1e22-08dc5cf03d51 X-MS-Exchange-CrossTenant-AuthSource: DU2PR04MB8822.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Apr 2024 02:03:27.2948 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 2jE1t4mjtrrKDS41v8LVIJ19JwrygUZUdu4qlzsX8tOUMKUIm9l6mTLiv9F5BQPqXmXi7oLDE+IIqRT8wYOtRQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR04MB9233 The user can set event and counter in cmdline and the driver need to parse it using 'config' attr value. This will add macro definitions to avoid hard-code in driver. Reviewed-by: Frank Li Signed-off-by: Xu Yang --- Changes in v4: - new patch Changes in v5: - move this patch earlier Changes in v6: - no changes Changes in v7: - use FIELD_* Changes in v8: - add Rb tag Changes in v9: - add Rb tag --- drivers/perf/fsl_imx9_ddr_perf.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/perf/fsl_imx9_ddr_perf.c b/drivers/perf/fsl_imx9_ddr_perf.c index 72c2d3074cde..0017f2c9ef91 100644 --- a/drivers/perf/fsl_imx9_ddr_perf.c +++ b/drivers/perf/fsl_imx9_ddr_perf.c @@ -42,6 +42,9 @@ #define NUM_COUNTERS 11 #define CYCLES_COUNTER 0 +#define CONFIG_EVENT GENMASK(7, 0) +#define CONFIG_COUNTER GENMASK(15, 8) + #define to_ddr_pmu(p) container_of(p, struct ddr_pmu, pmu) #define DDR_PERF_DEV_NAME "imx9_ddr" @@ -339,8 +342,10 @@ static void ddr_perf_counter_local_config(struct ddr_pmu *pmu, int config, int counter, bool enable) { u32 ctrl_a; + int event; ctrl_a = readl_relaxed(pmu->base + PMLCA(counter)); + event = FIELD_GET(CONFIG_EVENT, config); if (enable) { ctrl_a |= PMLCA_FC; @@ -352,7 +357,7 @@ static void ddr_perf_counter_local_config(struct ddr_pmu *pmu, int config, ctrl_a &= ~PMLCA_FC; ctrl_a |= PMLCA_CE; ctrl_a &= ~FIELD_PREP(PMLCA_EVENT, 0x7F); - ctrl_a |= FIELD_PREP(PMLCA_EVENT, (config & 0x000000FF)); + ctrl_a |= FIELD_PREP(PMLCA_EVENT, event); writel(ctrl_a, pmu->base + PMLCA(counter)); } else { /* Freeze counter. */ @@ -366,8 +371,8 @@ static void ddr_perf_monitor_config(struct ddr_pmu *pmu, int cfg, int cfg1, int u32 pmcfg1, pmcfg2; int event, counter; - event = cfg & 0x000000FF; - counter = (cfg & 0x0000FF00) >> 8; + event = FIELD_GET(CONFIG_EVENT, cfg); + counter = FIELD_GET(CONFIG_COUNTER, cfg); pmcfg1 = readl_relaxed(pmu->base + PMCFG1); @@ -469,7 +474,7 @@ static int ddr_perf_event_add(struct perf_event *event, int flags) int cfg2 = event->attr.config2; int counter; - counter = (cfg & 0x0000FF00) >> 8; + counter = FIELD_GET(CONFIG_COUNTER, cfg); pmu->events[counter] = event; pmu->active_events++;