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Sat, 4 May 2024 00:41:35 +0000 From: "Peng Fan (OSS)" Date: Sat, 04 May 2024 08:48:59 +0800 Subject: [PATCH 06/18] clk: imx: pll14xx: use rate_table for audio plls Message-Id: <20240504-imx-clk-v1-6-f7915489d58d@nxp.com> References: <20240504-imx-clk-v1-0-f7915489d58d@nxp.com> In-Reply-To: <20240504-imx-clk-v1-0-f7915489d58d@nxp.com> To: Abel Vesa , Michael Turquette , Stephen Boyd , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Jacky Bai , Ye Li , Dong Aisheng Cc: linux-clk@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Abel Vesa , Peng Fan , Shengjiu Wang X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1714783747; l=1433; i=peng.fan@nxp.com; s=20230812; h=from:subject:message-id; bh=VsebgP4ftghgfa/u4sGy9l2KDwyNnhs9lAuDW9Fh9Wk=; b=aVp+giJUzQcsNSUMXsSbiu6QN5r6I5Tyl3LzMxLTo5ogOocVK3wKi2EwzwUdTzN8oHEvxE8Hr tBRp3mRIEXTDPedZFQusxGLbKCkxddHAvMkBFWUFL35ouDLt+0LUpgp X-Developer-Key: i=peng.fan@nxp.com; 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Add rate_table for audio clocks to avoid such issue. Signed-off-by: Shengjiu Wang Reviewed-by: Jacky Bai Signed-off-by: Peng Fan --- drivers/clk/imx/clk-pll14xx.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c index 55812bfb9ec2..6b2c849f8b71 100644 --- a/drivers/clk/imx/clk-pll14xx.c +++ b/drivers/clk/imx/clk-pll14xx.c @@ -64,6 +64,17 @@ static const struct imx_pll14xx_rate_table imx_pll1443x_tbl[] = { PLL_1443X_RATE(650000000U, 325, 3, 2, 0), PLL_1443X_RATE(594000000U, 198, 2, 2, 0), PLL_1443X_RATE(519750000U, 173, 2, 2, 16384), + PLL_1443X_RATE(393216000U, 262, 2, 3, 9437), + PLL_1443X_RATE(361267200U, 361, 3, 3, 17511), + PLL_1443X_RATE(245760000U, 328, 4, 3, 0xae15), + PLL_1443X_RATE(225792000U, 226, 3, 3, 0xcac1), + PLL_1443X_RATE(122880000U, 328, 4, 4, 0xae15), + PLL_1443X_RATE(112896000U, 226, 3, 4, 0xcac1), + PLL_1443X_RATE(61440000U, 328, 4, 5, 0xae15), + PLL_1443X_RATE(56448000U, 226, 3, 5, 0xcac1), + PLL_1443X_RATE(49152000U, 393, 3, 6, 0x374c), + PLL_1443X_RATE(45158400U, 241, 2, 6, 0xd845), + PLL_1443X_RATE(40960000U, 109, 1, 6, 0x3a07), }; struct imx_pll14xx_clk imx_1443x_pll = {