| Message ID | 20240808090326.425296-1-alexander.stein@ew.tq-group.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/1] arm64: dts: imx8-ss-vpu: Fix imx8qm VPU IRQs | expand |
> Subject: [PATCH 1/1] arm64: dts: imx8-ss-vpu: Fix imx8qm VPU IRQs > > imx8-ss-vpu only contained imx8qxp IRQ numbers, only mu2_m0 uses > the correct imx8qm IRQ number, as imx8qxp lacks this MU. > Fix this by providing imx8qm IRQ numbers in the main imx8-ss-vpu.dtsi > and override the IRQ numbers in SoC-specific imx8qxp-ss-vpu.dtsi, > similar to reg property for VPU core devices. > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> > --- > I did not include a Fixes tag as adding support for imx8qxp and imx8qm > is split into several commits. It's at lease the combination of the > following commits: > > 0d9968d98467d ("arm64: dts: freescale: imx8q: add imx vpu codec > entries") b4efce453f0ca ("arm64: dts: imx8qm: add vpu decoder and > encoder") If you are using one patch to try to fix upper two commits, I think it would be better to separate the patch to fix the error of each upper commit and include Fixes tag. Regards, Peng.
Am Montag, 12. August 2024, 10:45:54 CEST schrieb Peng Fan: > > Subject: [PATCH 1/1] arm64: dts: imx8-ss-vpu: Fix imx8qm VPU IRQs > > > > imx8-ss-vpu only contained imx8qxp IRQ numbers, only mu2_m0 uses > > the correct imx8qm IRQ number, as imx8qxp lacks this MU. > > Fix this by providing imx8qm IRQ numbers in the main imx8-ss-vpu.dtsi > > and override the IRQ numbers in SoC-specific imx8qxp-ss-vpu.dtsi, > > similar to reg property for VPU core devices. > > > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> > > --- > > I did not include a Fixes tag as adding support for imx8qxp and imx8qm > > is split into several commits. It's at lease the combination of the > > following commits: > > > > 0d9968d98467d ("arm64: dts: freescale: imx8q: add imx vpu codec > > entries") b4efce453f0ca ("arm64: dts: imx8qm: add vpu decoder and > > encoder") > > If you are using one patch to try to fix upper two commits, I think > it would be better to separate the patch to fix the error of > each upper commit and include Fixes tag. Commit 0d9968d98467d ("arm64: dts: freescale: imx8q: add imx vpu codec entries") is talking about imx8q. This is most probably i.MX8 family, while I confused imx8q with imx8qxp, which is i.MX8X family... The naming scheme is so confusing :( For that reason I'll just add a Fixes for 0d9968d98467d. Best regards, Alexander
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi index c6540768bdb92..87211c18d65a9 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi @@ -15,7 +15,7 @@ vpu: vpu@2c000000 { mu_m0: mailbox@2d000000 { compatible = "fsl,imx6sx-mu"; reg = <0x2d000000 0x20000>; - interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>; #mbox-cells = <2>; power-domains = <&pd IMX_SC_R_VPU_MU_0>; status = "disabled"; @@ -24,7 +24,7 @@ mu_m0: mailbox@2d000000 { mu1_m0: mailbox@2d020000 { compatible = "fsl,imx6sx-mu"; reg = <0x2d020000 0x20000>; - interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>; #mbox-cells = <2>; power-domains = <&pd IMX_SC_R_VPU_MU_1>; status = "disabled"; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi index 7894a3ab26d6b..f81937b5fb720 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi @@ -5,6 +5,14 @@ * Author: Alexander Stein */ +&mu_m0 { + interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>; +}; + +&mu1_m0 { + interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>; +}; + &vpu_core0 { reg = <0x2d040000 0x10000>; };
imx8-ss-vpu only contained imx8qxp IRQ numbers, only mu2_m0 uses the correct imx8qm IRQ number, as imx8qxp lacks this MU. Fix this by providing imx8qm IRQ numbers in the main imx8-ss-vpu.dtsi and override the IRQ numbers in SoC-specific imx8qxp-ss-vpu.dtsi, similar to reg property for VPU core devices. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> --- I did not include a Fixes tag as adding support for imx8qxp and imx8qm is split into several commits. It's at lease the combination of the following commits: 0d9968d98467d ("arm64: dts: freescale: imx8q: add imx vpu codec entries") b4efce453f0ca ("arm64: dts: imx8qm: add vpu decoder and encoder") arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi | 4 ++-- arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi | 8 ++++++++ 2 files changed, 10 insertions(+), 2 deletions(-)