| Message ID | 20241012073543.1388069-2-victor.liu@nxp.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add ITE IT6263 LVDS to HDMI converter support | expand |
On 10/12/24 9:35 AM, Liu Ying wrote: > Add a panel-timing node to panel node to override any fixed display > modes written in a panel driver. This way, 68.9MHz clock frequency > specified in panel-timing node may accommodate 7-fold 482.3MHz > "media_ldb" clock which is derived from 964.6MHz "video_pll1" clock. > The above clock frequencies align to the clock rates assigned in the > lvds_bridge node and media_blk_ctrl node in this DT file. > > This should be able to suppress this LDB driver warning: > [ 17.206644] fsl-ldb 32ec0000.blk-ctrl:bridge@5c: Configured LDB clock (70000000 Hz) does not match requested LVDS clock: 490000000 Hz > > This also makes the display mode used by the panel pass mode validation > against pixel clock rate and "media_ldb" clock rate in a certain display > driver. > > Fixes: 6d382d51d979 ("arm64: dts: freescale: Add SKOV IMX8MP CPU revB board") > Signed-off-by: Liu Ying <victor.liu@nxp.com> > --- > v2: > * No change. > > .../freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts > index 3c2efdc59bfa..4e9f76de7462 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts > @@ -13,6 +13,21 @@ panel { > backlight = <&backlight>; > power-supply = <®_tft_vcom>; > > + panel-timing { > + clock-frequency = <68900000>; > + hactive = <1280>; > + vactive = <800>; > + hfront-porch = <30>; > + hback-porch = <30>; > + hsync-len = <10>; > + vfront-porch = <5>; > + vback-porch = <5>; > + vsync-len = <5>; > + hsync-active = <0>; > + vsync-active = <0>; > + de-active = <1>; > + }; There is an existing entry for this panel in panel-simple.c , please do not duplicate timings in the DT: drivers/gpu/drm/panel/panel-simple.c: .timings = &multi_inno_mi1010ait_1cp_timing, drivers/gpu/drm/panel/panel-simple.c: .compatible = "multi-inno,mi1010ait-1cp", drivers/gpu/drm/panel/panel-simple.c: .data = &multi_inno_mi1010ait_1cp,
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts index 3c2efdc59bfa..4e9f76de7462 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts @@ -13,6 +13,21 @@ panel { backlight = <&backlight>; power-supply = <®_tft_vcom>; + panel-timing { + clock-frequency = <68900000>; + hactive = <1280>; + vactive = <800>; + hfront-porch = <30>; + hback-porch = <30>; + hsync-len = <10>; + vfront-porch = <5>; + vback-porch = <5>; + vsync-len = <5>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + }; + port { in_lvds0: endpoint { remote-endpoint = <&ldb_lvds_ch0>;
Add a panel-timing node to panel node to override any fixed display modes written in a panel driver. This way, 68.9MHz clock frequency specified in panel-timing node may accommodate 7-fold 482.3MHz "media_ldb" clock which is derived from 964.6MHz "video_pll1" clock. The above clock frequencies align to the clock rates assigned in the lvds_bridge node and media_blk_ctrl node in this DT file. This should be able to suppress this LDB driver warning: [ 17.206644] fsl-ldb 32ec0000.blk-ctrl:bridge@5c: Configured LDB clock (70000000 Hz) does not match requested LVDS clock: 490000000 Hz This also makes the display mode used by the panel pass mode validation against pixel clock rate and "media_ldb" clock rate in a certain display driver. Fixes: 6d382d51d979 ("arm64: dts: freescale: Add SKOV IMX8MP CPU revB board") Signed-off-by: Liu Ying <victor.liu@nxp.com> --- v2: * No change. .../freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+)