| Message ID | 20241027-imx-clk-v1-v3-2-89152574d1d7@nxp.com (mailing list archive) |
|---|---|
| State | In Next, archived |
| Headers | show |
| Series | clk: imx: scu and fracn pll update | expand |
On 24-10-27 20:00:08, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@nxp.com> > > Per i.MX93 Reference Mannual 22.4 Initialization information > 1. Program appropriate value of DIV[ODIV], DIV[RDIV] and DIV[MFI] > as per Integer mode. > 2. Wait for 5 μs. > 3. Program the following field in CTRL register. > Set CTRL[POWERUP] to 1'b1 to enable PLL block. > 4. Poll PLL_STATUS[PLL_LOCK] register, and wait till PLL_STATUS[PLL_LOCK] > is 1'b1 and pll_lock output signal is 1'b1. > 5. Set CTRL[CLKMUX_EN] to 1'b1 to enable PLL output clock. > > So move the CLKMUX_EN operation after PLL locked. > > Fixes: 1b26cb8a77a4 ("clk: imx: support fracn gppll") > Co-developed-by: Jacky Bai <ping.bai@nxp.com> > Signed-off-by: Jacky Bai <ping.bai@nxp.com> > Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> > --- > drivers/clk/imx/clk-fracn-gppll.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c > index 591e0364ee5c113859a7b6271c8c11e98a0e0ffc..4749c3e0b7051cf53876664808aa28742f6861f7 100644 > --- a/drivers/clk/imx/clk-fracn-gppll.c > +++ b/drivers/clk/imx/clk-fracn-gppll.c > @@ -303,13 +303,13 @@ static int clk_fracn_gppll_prepare(struct clk_hw *hw) > val |= POWERUP_MASK; > writel_relaxed(val, pll->base + PLL_CTRL); > > - val |= CLKMUX_EN; > - writel_relaxed(val, pll->base + PLL_CTRL); > - > ret = clk_fracn_gppll_wait_lock(pll); > if (ret) > return ret; > > + val |= CLKMUX_EN; > + writel_relaxed(val, pll->base + PLL_CTRL); > + > val &= ~CLKMUX_BYPASS; > writel_relaxed(val, pll->base + PLL_CTRL); > > > -- > 2.37.1 >
diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c index 591e0364ee5c113859a7b6271c8c11e98a0e0ffc..4749c3e0b7051cf53876664808aa28742f6861f7 100644 --- a/drivers/clk/imx/clk-fracn-gppll.c +++ b/drivers/clk/imx/clk-fracn-gppll.c @@ -303,13 +303,13 @@ static int clk_fracn_gppll_prepare(struct clk_hw *hw) val |= POWERUP_MASK; writel_relaxed(val, pll->base + PLL_CTRL); - val |= CLKMUX_EN; - writel_relaxed(val, pll->base + PLL_CTRL); - ret = clk_fracn_gppll_wait_lock(pll); if (ret) return ret; + val |= CLKMUX_EN; + writel_relaxed(val, pll->base + PLL_CTRL); + val &= ~CLKMUX_BYPASS; writel_relaxed(val, pll->base + PLL_CTRL);