@@ -308,6 +308,12 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk.dtb
+imx95-15x15-evk-pcie0-ep-dtbs = imx95-15x15-evk.dtb imx-pcie0-ep.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk-pcie0-ep.dtb
+imx95-19x19-evk-pcie0-ep-dtbs += imx95-19x19-evk.dtb imx-pcie0-ep.dtbo
+imx95-19x19-evk-pcie1-ep-dtbs += imx95-19x19-evk.dtb imx-pcie1-ep.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk-pcie0-ep.dtb imx95-19x19-evk-pcie1-ep.dtb
+
imx8mm-kontron-dl-dtbs := imx8mm-kontron-bl.dtb imx8mm-kontron-dl.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-dl.dtb
new file mode 100644
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2025 NXP
+ */
+
+/dts-v1/;
+/plugin/;
+
+&pcie1 {
+ status = "disabled";
+};
+
+&pcie1_ep {
+ status = "okay";
+};
@@ -525,6 +525,13 @@ &pcie0 {
status = "okay";
};
+&pcie0_ep {
+ pinctrl-0 = <&pinctrl_pcie0>;
+ pinctrl-names = "default";
+ vpcie-supply = <®_m2_pwr>;
+ status = "disabled";
+};
+
&sai1 {
assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>,
<&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>,
@@ -417,6 +417,13 @@ &pcie0 {
status = "okay";
};
+&pcie0_ep {
+ pinctrl-0 = <&pinctrl_pcie0>;
+ pinctrl-names = "default";
+ vpcie-supply = <®_pcie0>;
+ status = "disabled";
+};
+
&pcie1 {
pinctrl-0 = <&pinctrl_pcie1>;
pinctrl-names = "default";
@@ -425,6 +432,13 @@ &pcie1 {
status = "okay";
};
+&pcie1_ep {
+ pinctrl-0 = <&pinctrl_pcie1>;
+ pinctrl-names = "default";
+ vpcie-supply = <®_slot_pwr>;
+ status = "disabled";
+};
+
&sai1 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
Create imx95-15x15-evk pcie0-ep and imx95-19x19-evk pcie[0,1]-ep dtb files. Signed-off-by: Frank Li <Frank.Li@nxp.com> --- arch/arm64/boot/dts/freescale/Makefile | 6 ++++++ arch/arm64/boot/dts/freescale/imx-pcie1-ep.dtso | 15 +++++++++++++++ arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts | 7 +++++++ arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 14 ++++++++++++++ 4 files changed, 42 insertions(+)