| Message ID | 20250407-imx-se-if-v15-3-e3382cecda01@nxp.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | firmware: imx: driver for NXP secure-enclave | expand |
On Mon, Apr 07, 2025 at 09:50:19PM +0530, Pankaj Gupta wrote: > Add support for NXP secure enclave called EdgeLock Enclave > firmware (se-fw) for imx8ulp-evk. Pleas wrap at 75 chars to use screen width efficiently. > > Add label sram0 for sram@2201f000 and add secure-enclave node > > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> > --- Move dts patches to last patch because generally driver patches was picked up firstly then dts files. driver part Maintainer will pick first N patch is easy than skip some in middile. Frank > changes from v14 to v15 > - Updated the commit message. > - split the current patch into two: > -- 3/7 for board dts, and > -- 4/7 for chip dts > > Note: copied the change logs for v13 to v14, to cover letter. > --- > arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > index 2562a35286c2..05db47668b7e 100644 > --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi > @@ -1,6 +1,6 @@ > // SPDX-License-Identifier: (GPL-2.0+ OR MIT) > /* > - * Copyright 2021 NXP > + * Copyright 2021, 2025 NXP > */ > > #include <dt-bindings/clock/imx8ulp-clock.h> > @@ -154,7 +154,7 @@ sosc: clock-sosc { > #clock-cells = <0>; > }; > > - sram@2201f000 { > + sram0: sram@2201f000 { > compatible = "mmio-sram"; > reg = <0x0 0x2201f000 0x0 0x1000>; > > @@ -186,6 +186,13 @@ scmi_sensor: protocol@15 { > #thermal-sensor-cells = <1>; > }; > }; > + > + hsm0: secure-enclave { > + compatible = "fsl,imx8ulp-se-ele-hsm"; > + mbox-names = "tx", "rx"; > + mboxes = <&s4muap 0 0>, <&s4muap 1 0>; > + sram = <&sram0>; > + }; > }; > > cm33: remoteproc-cm33 { > > -- > 2.43.0 >
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index 2562a35286c2..05db47668b7e 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2021 NXP + * Copyright 2021, 2025 NXP */ #include <dt-bindings/clock/imx8ulp-clock.h> @@ -154,7 +154,7 @@ sosc: clock-sosc { #clock-cells = <0>; }; - sram@2201f000 { + sram0: sram@2201f000 { compatible = "mmio-sram"; reg = <0x0 0x2201f000 0x0 0x1000>; @@ -186,6 +186,13 @@ scmi_sensor: protocol@15 { #thermal-sensor-cells = <1>; }; }; + + hsm0: secure-enclave { + compatible = "fsl,imx8ulp-se-ele-hsm"; + mbox-names = "tx", "rx"; + mboxes = <&s4muap 0 0>, <&s4muap 1 0>; + sram = <&sram0>; + }; }; cm33: remoteproc-cm33 {
Add support for NXP secure enclave called EdgeLock Enclave firmware (se-fw) for imx8ulp-evk. Add label sram0 for sram@2201f000 and add secure-enclave node Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> --- changes from v14 to v15 - Updated the commit message. - split the current patch into two: -- 3/7 for board dts, and -- 4/7 for chip dts Note: copied the change logs for v13 to v14, to cover letter. --- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-)